<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<meta name="generator" content="Doxygen 1.8.5"/>
<title>v_hdmiphy1: Overview</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript">
  $(document).ready(initResizable);
  $(window).load(resizeHeight);
</script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.png"/></td>
  <td style="padding-left: 0.5em;">
   <div id="projectname">v_hdmiphy1
   </div>
   <div id="projectbrief">Vitis Drivers API Documentation</div>
  </td>
 </tr>
 </tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.8.5 -->
  <div id="navrow1" class="tabs">
    <ul class="tablist">
      <li><a href="index.html"><span>Overview</span></a></li>
      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="globals.html"><span>APIs</span></a></li>
      <li><a href="files.html"><span>File&#160;List</span></a></li>
    </ul>
  </div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
  <div id="nav-tree">
    <div id="nav-tree-contents">
      <div id="nav-sync" class="sync"></div>
    </div>
  </div>
  <div id="splitbar" style="-moz-user-select:none;" 
       class="ui-resizable-handle">
  </div>
</div>
<script type="text/javascript">
$(document).ready(function(){initNavTree('group__xhdmiphy1.html','');});
</script>
<div id="doc-content">
<div class="header">
  <div class="summary">
<a href="#nested-classes">Data Structures</a> &#124;
<a href="#define-members">Macros</a> &#124;
<a href="#typedef-members">Typedefs</a> &#124;
<a href="#enum-members">Enumerations</a> &#124;
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">Overview</div>  </div>
</div><!--header-->
<div class="contents">
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hdmiphy1___pll_param.html">XHdmiphy1_PllParam</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for CPLL/QPLL programming.  <a href="struct_x_hdmiphy1___pll_param.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hdmiphy1___channel.html">XHdmiphy1_Channel</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for PLL type and its reference clock.  <a href="struct_x_hdmiphy1___channel.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hdmiphy1___mmcm.html">XHdmiphy1_Mmcm</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for MMCM programming.  <a href="struct_x_hdmiphy1___mmcm.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hdmiphy1___quad.html">XHdmiphy1_Quad</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef represents a GT quad.  <a href="struct_x_hdmiphy1___quad.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hdmiphy1___log.html">XHdmiphy1_Log</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains the logging mechanism for debug.  <a href="struct_x_hdmiphy1___log.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hdmiphy1___hdmi21_cfg.html">XHdmiphy1_Hdmi21Cfg</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains the HDMI 2.1 FRL configurations.  <a href="struct_x_hdmiphy1___hdmi21_cfg.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hdmiphy1___config.html">XHdmiphy1_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the Video PHY core.  <a href="struct_x_hdmiphy1___config.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> driver instance data.  <a href="struct_x_hdmiphy1.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga962d997981e2e284c3c9dd0e8a9a5752"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>(BaseAddress, RegOffset)&#160;&#160;&#160;XHdmiphy1_In32((BaseAddress) + (RegOffset))</td></tr>
<tr class="memdesc:ga962d997981e2e284c3c9dd0e8a9a5752"><td class="mdescLeft">&#160;</td><td class="mdescRight">This is a low-level function that reads from the specified register.  <a href="#ga962d997981e2e284c3c9dd0e8a9a5752">More...</a><br/></td></tr>
<tr class="separator:ga962d997981e2e284c3c9dd0e8a9a5752"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9e65226a4b7cf835cf8555e84d895555"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>(BaseAddress, RegOffset, Data)&#160;&#160;&#160;XHdmiphy1_Out32((BaseAddress) + (RegOffset), (Data))</td></tr>
<tr class="memdesc:ga9e65226a4b7cf835cf8555e84d895555"><td class="mdescLeft">&#160;</td><td class="mdescRight">This is a low-level function that writes to the specified register.  <a href="#ga9e65226a4b7cf835cf8555e84d895555">More...</a><br/></td></tr>
<tr class="separator:ga9e65226a4b7cf835cf8555e84d895555"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:ga5ff00002844b75068ea21b03514fcf04"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga5ff00002844b75068ea21b03514fcf04">XHdmiphy1_IntrHandler</a> )(void *InstancePtr)</td></tr>
<tr class="memdesc:ga5ff00002844b75068ea21b03514fcf04"><td class="mdescLeft">&#160;</td><td class="mdescRight">Callback type which represents the handler for interrupts.  <a href="#ga5ff00002844b75068ea21b03514fcf04">More...</a><br/></td></tr>
<tr class="separator:ga5ff00002844b75068ea21b03514fcf04"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7c61707222943633f7df3de4acf2d51a"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga7c61707222943633f7df3de4acf2d51a">XHdmiphy1_TimerHandler</a> )(void *InstancePtr, u32 MicroSeconds)</td></tr>
<tr class="memdesc:ga7c61707222943633f7df3de4acf2d51a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Callback type which represents a custom timer wait handler.  <a href="#ga7c61707222943633f7df3de4acf2d51a">More...</a><br/></td></tr>
<tr class="separator:ga7c61707222943633f7df3de4acf2d51a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga14ce1c0f480526922f42b9e7ff8dee8f"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga14ce1c0f480526922f42b9e7ff8dee8f">XHdmiphy1_Callback</a> )(void *CallbackRef)</td></tr>
<tr class="memdesc:ga14ce1c0f480526922f42b9e7ff8dee8f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generic callback type.  <a href="#ga14ce1c0f480526922f42b9e7ff8dee8f">More...</a><br/></td></tr>
<tr class="separator:ga14ce1c0f480526922f42b9e7ff8dee8f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga503c2ff79c8d1c28506c02d3be634763"><td class="memItemLeft" align="right" valign="top">typedef u64(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga503c2ff79c8d1c28506c02d3be634763">XHdmiphy1_LogCallback</a> )(void *CallbackRef)</td></tr>
<tr class="memdesc:ga503c2ff79c8d1c28506c02d3be634763"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generic callback type.  <a href="#ga503c2ff79c8d1c28506c02d3be634763">More...</a><br/></td></tr>
<tr class="separator:ga503c2ff79c8d1c28506c02d3be634763"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadcff193d2a45fbd03c48f595fe8fdf55"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gadcff193d2a45fbd03c48f595fe8fdf55">XHdmiphy1_ErrorCallback</a> )(void *CallbackRef)</td></tr>
<tr class="memdesc:gadcff193d2a45fbd03c48f595fe8fdf55"><td class="mdescLeft">&#160;</td><td class="mdescRight">Error callback type.  <a href="#gadcff193d2a45fbd03c48f595fe8fdf55">More...</a><br/></td></tr>
<tr class="separator:gadcff193d2a45fbd03c48f595fe8fdf55"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:ga3f9002a6b4bc8e47f9c1fa68f8d0fb15"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga3f9002a6b4bc8e47f9c1fa68f8d0fb15">XHdmiphy1_ProtocolType</a> </td></tr>
<tr class="memdesc:ga3f9002a6b4bc8e47f9c1fa68f8d0fb15"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef enumerates the various protocols handled by the Video PHY controller (HDMIPHY).  <a href="group__xhdmiphy1.html#ga3f9002a6b4bc8e47f9c1fa68f8d0fb15">More...</a><br/></td></tr>
<tr class="separator:ga3f9002a6b4bc8e47f9c1fa68f8d0fb15"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0babc37b8b55084caeefe57eef4fbd62"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga0babc37b8b55084caeefe57eef4fbd62">XHdmiphy1_IntrHandlerType</a> </td></tr>
<tr class="memdesc:ga0babc37b8b55084caeefe57eef4fbd62"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef enumerates the list of available interrupt handler types.  <a href="group__xhdmiphy1.html#ga0babc37b8b55084caeefe57eef4fbd62">More...</a><br/></td></tr>
<tr class="separator:ga0babc37b8b55084caeefe57eef4fbd62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8df8a80a15683dd3ffe31d80780f6329"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga8df8a80a15683dd3ffe31d80780f6329">XHdmiphy1_HdmiHandlerType</a> { <a class="el" href="group__xhdmiphy1.html#gga8df8a80a15683dd3ffe31d80780f6329a96b12cc5ff9908c81fcb6231b7aec8ac">XHDMIPHY1_HDMI_HANDLER_TXINIT</a> = 1, 
<a class="el" href="group__xhdmiphy1.html#gga8df8a80a15683dd3ffe31d80780f6329ae806cfadcc91063cd2bbeb8482f79433">XHDMIPHY1_HDMI_HANDLER_TXREADY</a>, 
<a class="el" href="group__xhdmiphy1.html#gga8df8a80a15683dd3ffe31d80780f6329a57c314d217e86af61f9e4e7d6e446e83">XHDMIPHY1_HDMI_HANDLER_RXINIT</a>, 
<a class="el" href="group__xhdmiphy1.html#gga8df8a80a15683dd3ffe31d80780f6329a419d981d4a35b761784f48e87adba9b3">XHDMIPHY1_HDMI_HANDLER_RXREADY</a>
 }</td></tr>
<tr class="memdesc:ga8df8a80a15683dd3ffe31d80780f6329"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef enumerates the list of available hdmi handler types.  <a href="group__xhdmiphy1.html#ga8df8a80a15683dd3ffe31d80780f6329">More...</a><br/></td></tr>
<tr class="separator:ga8df8a80a15683dd3ffe31d80780f6329"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae8559ee2ca7c404467a72f4653a5d4f5"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a> </td></tr>
<tr class="memdesc:gae8559ee2ca7c404467a72f4653a5d4f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef enumerates the different PLL types for a given GT channel.  <a href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">More...</a><br/></td></tr>
<tr class="separator:gae8559ee2ca7c404467a72f4653a5d4f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga54f72201d2012e3c638ec92b5e310f23"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> </td></tr>
<tr class="memdesc:ga54f72201d2012e3c638ec92b5e310f23"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef enumerates the available channels.  <a href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">More...</a><br/></td></tr>
<tr class="separator:ga54f72201d2012e3c638ec92b5e310f23"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaec55cf3dfcfa0c7cf9749c63690dd019"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaec55cf3dfcfa0c7cf9749c63690dd019">XHdmiphy1_PllRefClkSelType</a> </td></tr>
<tr class="memdesc:gaec55cf3dfcfa0c7cf9749c63690dd019"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef enumerates the available reference clocks for the PLL clock selection multiplexer.  <a href="group__xhdmiphy1.html#gaec55cf3dfcfa0c7cf9749c63690dd019">More...</a><br/></td></tr>
<tr class="separator:gaec55cf3dfcfa0c7cf9749c63690dd019"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d998790546ec3dde5119376868686e6"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a> </td></tr>
<tr class="memdesc:ga4d998790546ec3dde5119376868686e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef enumerates the available reference clocks used to drive the RX/TX datapaths.  <a href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">More...</a><br/></td></tr>
<tr class="separator:ga4d998790546ec3dde5119376868686e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac87909fabb3f765c0be156e7082aea8e"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gac87909fabb3f765c0be156e7082aea8e">XHdmiphy1_SysClkOutSelType</a> </td></tr>
<tr class="memdesc:gac87909fabb3f765c0be156e7082aea8e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef enumerates the available reference clocks used to drive the RX/TX output clocks.  <a href="group__xhdmiphy1.html#gac87909fabb3f765c0be156e7082aea8e">More...</a><br/></td></tr>
<tr class="separator:gac87909fabb3f765c0be156e7082aea8e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1b751875671500e5b0173be954368177"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga1b751875671500e5b0173be954368177">XHdmiphy1_OutClkSelType</a> </td></tr>
<tr class="memdesc:ga1b751875671500e5b0173be954368177"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef enumerates the available clocks that are used as multiplexer input selections for the RX/TX output clock.  <a href="group__xhdmiphy1.html#ga1b751875671500e5b0173be954368177">More...</a><br/></td></tr>
<tr class="separator:ga1b751875671500e5b0173be954368177"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga19e4c793abee3457123797eca4f61cd0"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga19e4c793abee3457123797eca4f61cd0">XHdmiphy1_GtState</a> { <br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0abb6da8fd6d31dd97dea1910021b0d8f7">XHDMIPHY1_GT_STATE_IDLE</a>, 
<a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0a8237da6c8720d2611ec2eb56927e9fd6">XHDMIPHY1_GT_STATE_GPO_RE</a>, 
<a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0aeb66246b5c2c3de1c42d34fc8a5a9de2">XHDMIPHY1_GT_STATE_LOCK</a>, 
<a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0adbd966511bbee7acb1ce508578605fb6">XHDMIPHY1_GT_STATE_RESET</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0a540efa0ad171c67927e0364e77bf0ab0">XHDMIPHY1_GT_STATE_ALIGN</a>, 
<a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0af0bd0b978b52982e2caf6a30afc3f57d">XHDMIPHY1_GT_STATE_READY</a>
<br/>
 }</td></tr>
<tr class="separator:ga19e4c793abee3457123797eca4f61cd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga507763f75897762cabf8819fde24ab8f"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga507763f75897762cabf8819fde24ab8f">XHdmiphy1_LogEvent</a> { <br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa05c6742ec935bcbad19af54685b3d9f5">XHDMIPHY1_LOG_EVT_NONE</a> = 1, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa91285a2fe900849e83aa45be23b8fc31">XHDMIPHY1_LOG_EVT_QPLL_EN</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa2f2949d1be35d7c96902fe8b031d6251">XHDMIPHY1_LOG_EVT_QPLL_RST</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fae542d14fe31f4366262597571621900b">XHDMIPHY1_LOG_EVT_QPLL_LOCK</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fad1a525f5335b7c7814e19fc19e8dee78">XHDMIPHY1_LOG_EVT_QPLL_RECONFIG</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faab11ea8cc0444e9eaebfc01d2e25c2e1">XHDMIPHY1_LOG_EVT_QPLL0_EN</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa544654893a30ea4372fde78d3da63efe">XHDMIPHY1_LOG_EVT_QPLL0_RST</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab7973c8195409260d4b4c17edd2107f6">XHDMIPHY1_LOG_EVT_QPLL0_LOCK</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa9730d0f429cc284bf9239c464962514f">XHDMIPHY1_LOG_EVT_QPLL0_RECONFIG</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fad12d4e763346f6f277aaaeee968f9b1b">XHDMIPHY1_LOG_EVT_QPLL1_EN</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa8f6ebe550852ace5dcb397e0e92e7de5">XHDMIPHY1_LOG_EVT_QPLL1_RST</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa99870e5fedc372c2161de8f595976c89">XHDMIPHY1_LOG_EVT_QPLL1_LOCK</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa4d242a87ab686b95bf2ce14ca72001e8">XHDMIPHY1_LOG_EVT_QPLL1_RECONFIG</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa7a74c2aff0510429874c8467fbfa720b">XHDMIPHY1_LOG_EVT_PLL0_EN</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fabb0430d0b85286e505c0f956279edd68">XHDMIPHY1_LOG_EVT_PLL0_RST</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab13829acbd775009fcc1f01514a9fe91">XHDMIPHY1_LOG_EVT_PLL1_EN</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fad9ca01949d854ce10d3bc43a5ca215a8">XHDMIPHY1_LOG_EVT_PLL1_RST</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa6291555f8d5842b49cc85b1992b93171">XHDMIPHY1_LOG_EVT_CPLL_EN</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa84d8493337faf9af93ce135edca252ae">XHDMIPHY1_LOG_EVT_CPLL_RST</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fadb7701b9317cdb208995d002892d0eac">XHDMIPHY1_LOG_EVT_CPLL_LOCK</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fafe46d81b98d1f454e167f1850d51e73c">XHDMIPHY1_LOG_EVT_CPLL_RECONFIG</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa8579679c6be1018462759ab6d24f694a">XHDMIPHY1_LOG_EVT_LCPLL_LOCK</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa88ab82faf45e848827696960f46af78b">XHDMIPHY1_LOG_EVT_RPLL_LOCK</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab85fcce757da0b66c9944fa7f7d75eef">XHDMIPHY1_LOG_EVT_TXPLL_EN</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faed656efbf8d1665cc583db964226960a">XHDMIPHY1_LOG_EVT_TXPLL_RST</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab005d48a1421a996107763e25a79ed6a">XHDMIPHY1_LOG_EVT_RXPLL_EN</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa34f1adc5b5220146133d12c5c673c466">XHDMIPHY1_LOG_EVT_RXPLL_RST</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab48a003daba5c49c31327d31a7344fdb">XHDMIPHY1_LOG_EVT_GTRX_RST</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fae3b7e5bdbde62c0539b69660ff718a2f">XHDMIPHY1_LOG_EVT_GTTX_RST</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa6ba098981c6f7e8717ab0b3d166facdc">XHDMIPHY1_LOG_EVT_VID_TX_RST</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa3dbbacab895e2f48455597b95f20d3e6">XHDMIPHY1_LOG_EVT_VID_RX_RST</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa4977e4ce8c8d2017bbc96f3675325b99">XHDMIPHY1_LOG_EVT_TX_ALIGN</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faac936f6bc91762d6621757e29b471994">XHDMIPHY1_LOG_EVT_TX_ALIGN_TMOUT</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fafed065faee2d08d40b502fff4c292445">XHDMIPHY1_LOG_EVT_TX_TMR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faf2277760e6b71229d82ecf73f95201da">XHDMIPHY1_LOG_EVT_RX_TMR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab037d8fe4e7d9efa115f91602c0e19d5">XHDMIPHY1_LOG_EVT_GT_RECONFIG</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fac9bbc691736d2c3f8ecf4456e98b7b18">XHDMIPHY1_LOG_EVT_GT_TX_RECONFIG</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa1950033e842d74ae93cf70842b6f9f03">XHDMIPHY1_LOG_EVT_GT_RX_RECONFIG</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faec83e85f882616806c051d6280541031">XHDMIPHY1_LOG_EVT_INIT</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8facd89910057776a6a302595c1e6aaf263">XHDMIPHY1_LOG_EVT_TXPLL_RECONFIG</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faf0cd31f3544b0433a61a07313f7306c4">XHDMIPHY1_LOG_EVT_RXPLL_RECONFIG</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa56be305ac94b4fde45ed7f96f2f60416">XHDMIPHY1_LOG_EVT_RXPLL_LOCK</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faecedb4454e45d609203050d25fb628a9">XHDMIPHY1_LOG_EVT_TXPLL_LOCK</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faf1558ff041531923de26d2cdf21faeb5">XHDMIPHY1_LOG_EVT_TX_RST_DONE</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa07750319efaea19cbec4aa97eab21bee">XHDMIPHY1_LOG_EVT_RX_RST_DONE</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa8e08806e0035981f0aeac11963e9b29d">XHDMIPHY1_LOG_EVT_TX_FREQ</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa7e97df6b0482956381f42935d4088413">XHDMIPHY1_LOG_EVT_RX_FREQ</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa9bd193450a0b8149982ea2bd8e4b334b">XHDMIPHY1_LOG_EVT_DRU_EN</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fad1249231d3dd37dc9b246750de6c468a">XHDMIPHY1_LOG_EVT_TXGPO_RE</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab5aab4974e5d695941267b02c063b6bf">XHDMIPHY1_LOG_EVT_RXGPO_RE</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fae974e310d8245fa9285d8a3d460c6701">XHDMIPHY1_LOG_EVT_FRL_RECONFIG</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa924af29f57a82f33882dce6c2de2215b">XHDMIPHY1_LOG_EVT_TMDS_RECONFIG</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa737d1a41d1b1a576101bd574080f08d1">XHDMIPHY1_LOG_EVT_1PPC_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa618c0fbfd33c119da0e2b28cf514972d">XHDMIPHY1_LOG_EVT_PPC_MSMTCH_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab28d0791b29cf76ead1a21aef864e70c">XHDMIPHY1_LOG_EVT_VDCLK_HIGH_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fad34e90440aa943deb81d65f994e7272b">XHDMIPHY1_LOG_EVT_NO_DRU</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fac16c7e8601244f595cd804fe75df142b">XHDMIPHY1_LOG_EVT_GT_QPLL_CFG_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa1591a806934dc21fa2368d022cd0f12d">XHDMIPHY1_LOG_EVT_GT_CPLL_CFG_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa4f69c113ecd57c23854146858f0c9269">XHDMIPHY1_LOG_EVT_GT_LCPLL_CFG_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa31b63c120656778e61b40ac16e914019">XHDMIPHY1_LOG_EVT_GT_RPLL_CFG_ERR</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa1c67cc48ccc5a88ac43e15fe694879b6">XHDMIPHY1_LOG_EVT_VD_NOT_SPRTD_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fae623db986f9d02253c3ccbec9f5c6963">XHDMIPHY1_LOG_EVT_MMCM_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa53ab59ff98e6c0f14d01b573c1adb9ad">XHDMIPHY1_LOG_EVT_HDMI20_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab955fbee9a933ef6bbebf9d04a8ad1db">XHDMIPHY1_LOG_EVT_NO_QPLL_ERR</a>, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa16d87e8ac61927ee62d631af02a55eea">XHDMIPHY1_LOG_EVT_DRU_CLK_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fabf63790d5f5a16fdfbbd3c5d2680fa29">XHDMIPHY1_LOG_EVT_USRCLK_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa087c065913419984d661cf0488fe3e7e">XHDMIPHY1_LOG_EVT_SPDGRDE_ERR</a>, 
<a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fac5e344d7d6b6232fbba3fa5698de8532">XHDMIPHY1_LOG_EVT_DUMMY</a>
<br/>
 }</td></tr>
<tr class="separator:ga507763f75897762cabf8819fde24ab8f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga99fd3078ca6a97efc41ebae0ab9848b4"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga99fd3078ca6a97efc41ebae0ab9848b4">XHdmiphy1_HdmiTx_Patgen</a> { <br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga99fd3078ca6a97efc41ebae0ab9848b4a2287e71d5eb5822fdad68ffc7014727d">XHDMIPHY1_Patgen_Ratio_10</a> = 0x1, 
<a class="el" href="group__xhdmiphy1.html#gga99fd3078ca6a97efc41ebae0ab9848b4a4cd912ee1ca0dcf2908d7da89aa67a8b">XHDMIPHY1_Patgen_Ratio_20</a> = 0x2, 
<a class="el" href="group__xhdmiphy1.html#gga99fd3078ca6a97efc41ebae0ab9848b4a2110a4eeb03152e3beed98547b3ae92c">XHDMIPHY1_Patgen_Ratio_30</a> = 0x3, 
<a class="el" href="group__xhdmiphy1.html#gga99fd3078ca6a97efc41ebae0ab9848b4a35d0720f27d6bb3698e239fe2a9e79dd">XHDMIPHY1_Patgen_Ratio_40</a> = 0x4, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga99fd3078ca6a97efc41ebae0ab9848b4a54e14196cdba218c9339ab646bc6f183">XHDMIPHY1_Patgen_Ratio_50</a> = 0x5
<br/>
 }</td></tr>
<tr class="separator:ga99fd3078ca6a97efc41ebae0ab9848b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3532b332baefc7e9454c8d485aedb4c9"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga3532b332baefc7e9454c8d485aedb4c9">XHdmiphy1_PrbsPattern</a> { <br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga3532b332baefc7e9454c8d485aedb4c9ae0898365a0b18b77ba8aa9ff62ae6cc8">XHDMIPHY1_PRBSSEL_STD_MODE</a> = 0x0, 
<a class="el" href="group__xhdmiphy1.html#gga3532b332baefc7e9454c8d485aedb4c9af6f4f716f17df5edd1159f6ef190beaa">XHDMIPHY1_PRBSSEL_PRBS7</a> = 0x1, 
<a class="el" href="group__xhdmiphy1.html#gga3532b332baefc7e9454c8d485aedb4c9a2b2bcf27a138709fe68eeb64196d905b">XHDMIPHY1_PRBSSEL_PRBS9</a> = 0x2, 
<a class="el" href="group__xhdmiphy1.html#gga3532b332baefc7e9454c8d485aedb4c9a902b603e09315a9fd882d54c5931ead9">XHDMIPHY1_PRBSSEL_PRBS15</a> = 0x3, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga3532b332baefc7e9454c8d485aedb4c9a160dcf174e121f49389ebffbcaad1b9d">XHDMIPHY1_PRBSSEL_PRBS23</a> = 0x4, 
<a class="el" href="group__xhdmiphy1.html#gga3532b332baefc7e9454c8d485aedb4c9a6e33841bd8f7289de780ffc2448f34a5">XHDMIPHY1_PRBSSEL_PRBS31</a> = 0x5, 
<a class="el" href="group__xhdmiphy1.html#gga3532b332baefc7e9454c8d485aedb4c9af77b0f4ab5babf65a0564dee707db0a3">XHDMIPHY1_PRBSSEL_PCIE</a> = 0x8, 
<a class="el" href="group__xhdmiphy1.html#gga3532b332baefc7e9454c8d485aedb4c9ad3ac6e5e70273461a0d7dd7b8f354d63">XHDMIPHY1_PRBSSEL_SQUARE_2UI</a> = 0x9, 
<br/>
&#160;&#160;<a class="el" href="group__xhdmiphy1.html#gga3532b332baefc7e9454c8d485aedb4c9ad41202a47ce4ece76aab4ec3fe631a7a">XHDMIPHY1_PRBSSEL_SQUARE_16UI</a> = 0xA
<br/>
 }</td></tr>
<tr class="memdesc:ga3532b332baefc7e9454c8d485aedb4c9"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef enumerates the available PRBS patterns available from the.  <a href="group__xhdmiphy1.html#ga3532b332baefc7e9454c8d485aedb4c9">More...</a><br/></td></tr>
<tr class="separator:ga3532b332baefc7e9454c8d485aedb4c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:gac17db2af38544c85cb299d147fcdac16"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gac17db2af38544c85cb299d147fcdac16">XHdmiphy1_CfgInitialize</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, <a class="el" href="struct_x_hdmiphy1___config.html">XHdmiphy1_Config</a> *ConfigPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:gac17db2af38544c85cb299d147fcdac16"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function retrieves the configuration for this Video PHY instance and fills in the InstancePtr-&gt;Config structure.  <a href="#gac17db2af38544c85cb299d147fcdac16">More...</a><br/></td></tr>
<tr class="separator:gac17db2af38544c85cb299d147fcdac16"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga82f13f4133bdf9ab03d845c8462dc091"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga82f13f4133bdf9ab03d845c8462dc091">XHdmiphy1_PllInitialize</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, <a class="el" href="group__xhdmiphy1.html#gaec55cf3dfcfa0c7cf9749c63690dd019">XHdmiphy1_PllRefClkSelType</a> QpllRefClkSel, <a class="el" href="group__xhdmiphy1.html#gaec55cf3dfcfa0c7cf9749c63690dd019">XHdmiphy1_PllRefClkSelType</a> CpllxRefClkSel, <a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a> TxPllSelect, <a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a> RxPllSelect)</td></tr>
<tr class="memdesc:ga82f13f4133bdf9ab03d845c8462dc091"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will initialize the PLL selection for a given channel.  <a href="#ga82f13f4133bdf9ab03d845c8462dc091">More...</a><br/></td></tr>
<tr class="separator:ga82f13f4133bdf9ab03d845c8462dc091"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf6a4e05c5b6141f00bdfa2ae1f30b15a"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaf6a4e05c5b6141f00bdfa2ae1f30b15a">XHdmiphy1_GetVersion</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaf6a4e05c5b6141f00bdfa2ae1f30b15a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will obtian the IP version.  <a href="#gaf6a4e05c5b6141f00bdfa2ae1f30b15a">More...</a><br/></td></tr>
<tr class="separator:gaf6a4e05c5b6141f00bdfa2ae1f30b15a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabe478d42590c0365f3e2feb3933321ec"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gabe478d42590c0365f3e2feb3933321ec">XHdmiphy1_WaitUs</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u32 MicroSeconds)</td></tr>
<tr class="memdesc:gabe478d42590c0365f3e2feb3933321ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the delay/sleep function for the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> driver.  <a href="#gabe478d42590c0365f3e2feb3933321ec">More...</a><br/></td></tr>
<tr class="separator:gabe478d42590c0365f3e2feb3933321ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga71a574c5aedf401c9b7c59a173822f8f"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga71a574c5aedf401c9b7c59a173822f8f">XHdmiphy1_CfgLineRate</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u64 LineRateHz)</td></tr>
<tr class="memdesc:ga71a574c5aedf401c9b7c59a173822f8f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure the channel's line rate.  <a href="#ga71a574c5aedf401c9b7c59a173822f8f">More...</a><br/></td></tr>
<tr class="separator:ga71a574c5aedf401c9b7c59a173822f8f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga97e1d4070dafe5a73d9bf60621382c98"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga97e1d4070dafe5a73d9bf60621382c98">XHdmiphy1_GetPllType</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId)</td></tr>
<tr class="memdesc:ga97e1d4070dafe5a73d9bf60621382c98"><td class="mdescLeft">&#160;</td><td class="mdescRight">Obtain the channel's PLL reference clock selection.  <a href="#ga97e1d4070dafe5a73d9bf60621382c98">More...</a><br/></td></tr>
<tr class="separator:ga97e1d4070dafe5a73d9bf60621382c98"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga31263f99c22623f852ea864fba080232"><td class="memItemLeft" align="right" valign="top">u64&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga31263f99c22623f852ea864fba080232">XHdmiphy1_GetLineRateHz</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId)</td></tr>
<tr class="memdesc:ga31263f99c22623f852ea864fba080232"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will return the line rate in Hz for a given channel / quad.  <a href="#ga31263f99c22623f852ea864fba080232">More...</a><br/></td></tr>
<tr class="separator:ga31263f99c22623f852ea864fba080232"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7f1f22be7f2029c396c015e322475790"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga7f1f22be7f2029c396c015e322475790">XHdmiphy1_ResetGtPll</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir, u8 Hold)</td></tr>
<tr class="memdesc:ga7f1f22be7f2029c396c015e322475790"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will reset the GT's PLL logic.  <a href="#ga7f1f22be7f2029c396c015e322475790">More...</a><br/></td></tr>
<tr class="separator:ga7f1f22be7f2029c396c015e322475790"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga117b1b06a6044a0574731e960e8e304a"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga117b1b06a6044a0574731e960e8e304a">XHdmiphy1_ResetGtTxRx</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir, u8 Hold)</td></tr>
<tr class="memdesc:ga117b1b06a6044a0574731e960e8e304a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will reset the GT's TX/RX logic.  <a href="#ga117b1b06a6044a0574731e960e8e304a">More...</a><br/></td></tr>
<tr class="separator:ga117b1b06a6044a0574731e960e8e304a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga615fe597062a12b286153f2ee8007e91"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga615fe597062a12b286153f2ee8007e91">XHdmiphy1_SetPolarity</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir, u8 Polarity)</td></tr>
<tr class="memdesc:ga615fe597062a12b286153f2ee8007e91"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will set/clear the TX/RX polarity bit.  <a href="#ga615fe597062a12b286153f2ee8007e91">More...</a><br/></td></tr>
<tr class="separator:ga615fe597062a12b286153f2ee8007e91"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga041ec28c400f1b4cb662d9670e0feff3"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga041ec28c400f1b4cb662d9670e0feff3">XHdmiphy1_SetPrbsSel</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir, <a class="el" href="group__xhdmiphy1.html#ga3532b332baefc7e9454c8d485aedb4c9">XHdmiphy1_PrbsPattern</a> Pattern)</td></tr>
<tr class="memdesc:ga041ec28c400f1b4cb662d9670e0feff3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will set the TX/RXPRBSEL of the GT.  <a href="#ga041ec28c400f1b4cb662d9670e0feff3">More...</a><br/></td></tr>
<tr class="separator:ga041ec28c400f1b4cb662d9670e0feff3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae474ac8f1f2997229ec25e7584a4b827"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gae474ac8f1f2997229ec25e7584a4b827">XHdmiphy1_TxPrbsForceError</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u8 ForceErr)</td></tr>
<tr class="memdesc:gae474ac8f1f2997229ec25e7584a4b827"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will set the TX/RXPRBSEL of the GT.  <a href="#gae474ac8f1f2997229ec25e7584a4b827">More...</a><br/></td></tr>
<tr class="separator:gae474ac8f1f2997229ec25e7584a4b827"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa01b2c0214336ba205fcac3c8fd7675d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaa01b2c0214336ba205fcac3c8fd7675d">XHdmiphy1_SetTxVoltageSwing</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u8 Vs)</td></tr>
<tr class="memdesc:gaa01b2c0214336ba205fcac3c8fd7675d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will set the TX voltage swing value for a given channel.  <a href="#gaa01b2c0214336ba205fcac3c8fd7675d">More...</a><br/></td></tr>
<tr class="separator:gaa01b2c0214336ba205fcac3c8fd7675d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad9dd0d271c9be7416e55adc535257cea"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gad9dd0d271c9be7416e55adc535257cea">XHdmiphy1_SetTxPreEmphasis</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u8 Pe)</td></tr>
<tr class="memdesc:gad9dd0d271c9be7416e55adc535257cea"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will set the TX pre-emphasis value for a given channel.  <a href="#gad9dd0d271c9be7416e55adc535257cea">More...</a><br/></td></tr>
<tr class="separator:gad9dd0d271c9be7416e55adc535257cea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga755a209f0abe848a3508017f83ad4c62"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga755a209f0abe848a3508017f83ad4c62">XHdmiphy1_SetTxPostCursor</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u8 Pc)</td></tr>
<tr class="memdesc:ga755a209f0abe848a3508017f83ad4c62"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will set the TX post-curosr value for a given channel.  <a href="#ga755a209f0abe848a3508017f83ad4c62">More...</a><br/></td></tr>
<tr class="separator:ga755a209f0abe848a3508017f83ad4c62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga704b9c7161c4ac92beaa07113caaa36c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga704b9c7161c4ac92beaa07113caaa36c">XHdmiphy1_SetRxLpm</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir, u8 Enable)</td></tr>
<tr class="memdesc:ga704b9c7161c4ac92beaa07113caaa36c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will enable or disable the LPM logic in the Video PHY core.  <a href="#ga704b9c7161c4ac92beaa07113caaa36c">More...</a><br/></td></tr>
<tr class="separator:ga704b9c7161c4ac92beaa07113caaa36c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga632197e5f773491cdf96f076e7112e0f"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga632197e5f773491cdf96f076e7112e0f">XHdmiphy1_DrpWr</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u16 Addr, u16 Val)</td></tr>
<tr class="memdesc:ga632197e5f773491cdf96f076e7112e0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will initiate a write DRP transaction.  <a href="#ga632197e5f773491cdf96f076e7112e0f">More...</a><br/></td></tr>
<tr class="separator:ga632197e5f773491cdf96f076e7112e0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga55c5c6061828e1f986b64d4c0ae9a57b"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga55c5c6061828e1f986b64d4c0ae9a57b">XHdmiphy1_DrpRd</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u16 Addr, u16 *RetVal)</td></tr>
<tr class="memdesc:ga55c5c6061828e1f986b64d4c0ae9a57b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will initiate a read DRP transaction.  <a href="#ga55c5c6061828e1f986b64d4c0ae9a57b">More...</a><br/></td></tr>
<tr class="separator:ga55c5c6061828e1f986b64d4c0ae9a57b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga13859cf616b98f6d37336128b9f3f21a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga13859cf616b98f6d37336128b9f3f21a">XHdmiphy1_MmcmPowerDown</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, u8 Hold)</td></tr>
<tr class="memdesc:ga13859cf616b98f6d37336128b9f3f21a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will power down the mixed-mode clock manager (MMCM) core.  <a href="#ga13859cf616b98f6d37336128b9f3f21a">More...</a><br/></td></tr>
<tr class="separator:ga13859cf616b98f6d37336128b9f3f21a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5dc7ec503e2e78570719440c12773984"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga5dc7ec503e2e78570719440c12773984">XHdmiphy1_MmcmStart</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir)</td></tr>
<tr class="memdesc:ga5dc7ec503e2e78570719440c12773984"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will start the mixed-mode clock manager (MMCM) core.  <a href="#ga5dc7ec503e2e78570719440c12773984">More...</a><br/></td></tr>
<tr class="separator:ga5dc7ec503e2e78570719440c12773984"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga57aac6b723825d9999dc5419d067bda3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga57aac6b723825d9999dc5419d067bda3">XHdmiphy1_IBufDsEnable</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, u8 Enable)</td></tr>
<tr class="memdesc:ga57aac6b723825d9999dc5419d067bda3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the TX or RX IBUFDS peripheral.  <a href="#ga57aac6b723825d9999dc5419d067bda3">More...</a><br/></td></tr>
<tr class="separator:ga57aac6b723825d9999dc5419d067bda3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab511031505e9679f2bd243d68eb725f4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gab511031505e9679f2bd243d68eb725f4">XHdmiphy1_Clkout1OBufTdsEnable</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, XHdmiphy1_DirectionType Dir, u8 Enable)</td></tr>
<tr class="memdesc:gab511031505e9679f2bd243d68eb725f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the TX or RX CLKOUT1 OBUFTDS peripheral.  <a href="#gab511031505e9679f2bd243d68eb725f4">More...</a><br/></td></tr>
<tr class="separator:gab511031505e9679f2bd243d68eb725f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga90147f575dee01a888964ba10cdf4f73"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga90147f575dee01a888964ba10cdf4f73">XHdmiphy1_SetErrorCallback</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, void *CallbackFunc, void *CallbackRef)</td></tr>
<tr class="memdesc:ga90147f575dee01a888964ba10cdf4f73"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function installs a callback function for the HDMIPHY error conditions.  <a href="#ga90147f575dee01a888964ba10cdf4f73">More...</a><br/></td></tr>
<tr class="separator:ga90147f575dee01a888964ba10cdf4f73"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7efb70724bc3a6fa0d3bd6c9d7d22de4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga7efb70724bc3a6fa0d3bd6c9d7d22de4">XHdmiphy1_SetLogCallback</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u64 *CallbackFunc, void *CallbackRef)</td></tr>
<tr class="memdesc:ga7efb70724bc3a6fa0d3bd6c9d7d22de4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function installs an asynchronous callback function for the LogWrite API:  <a href="#ga7efb70724bc3a6fa0d3bd6c9d7d22de4">More...</a><br/></td></tr>
<tr class="separator:ga7efb70724bc3a6fa0d3bd6c9d7d22de4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9569d5080ff8e2396239ecfb7d1de91d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga9569d5080ff8e2396239ecfb7d1de91d">XHdmiphy1_LogDisplay</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga9569d5080ff8e2396239ecfb7d1de91d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will print the entire log.  <a href="#ga9569d5080ff8e2396239ecfb7d1de91d">More...</a><br/></td></tr>
<tr class="separator:ga9569d5080ff8e2396239ecfb7d1de91d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga67dcfc543f278ca875c99f6dada92520"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga67dcfc543f278ca875c99f6dada92520">XHdmiphy1_LogReset</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga67dcfc543f278ca875c99f6dada92520"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will reset the driver's logginc mechanism.  <a href="#ga67dcfc543f278ca875c99f6dada92520">More...</a><br/></td></tr>
<tr class="separator:ga67dcfc543f278ca875c99f6dada92520"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafef83d134d6ba3cf7ed6ff58c5aa76c0"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gafef83d134d6ba3cf7ed6ff58c5aa76c0">XHdmiphy1_LogRead</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:gafef83d134d6ba3cf7ed6ff58c5aa76c0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will read the last event from the log.  <a href="#gafef83d134d6ba3cf7ed6ff58c5aa76c0">More...</a><br/></td></tr>
<tr class="separator:gafef83d134d6ba3cf7ed6ff58c5aa76c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabda0c5df35f1e8c13b871c8edf38ff38"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, <a class="el" href="group__xhdmiphy1.html#ga507763f75897762cabf8819fde24ab8f">XHdmiphy1_LogEvent</a> Evt, u8 Data)</td></tr>
<tr class="memdesc:gabda0c5df35f1e8c13b871c8edf38ff38"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will insert an event in the driver's logginc mechanism.  <a href="#gabda0c5df35f1e8c13b871c8edf38ff38">More...</a><br/></td></tr>
<tr class="separator:gabda0c5df35f1e8c13b871c8edf38ff38"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacb93fcb29ad3045d260d3fbbaa0be81e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gacb93fcb29ad3045d260d3fbbaa0be81e">XHdmiphy1_InterruptHandler</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:gacb93fcb29ad3045d260d3fbbaa0be81e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the interrupt handler for the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> driver.  <a href="#gacb93fcb29ad3045d260d3fbbaa0be81e">More...</a><br/></td></tr>
<tr class="separator:gacb93fcb29ad3045d260d3fbbaa0be81e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga08947cfedb541b7f95242c82ee60a8c5"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga08947cfedb541b7f95242c82ee60a8c5">XHdmiphy1_SelfTest</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga08947cfedb541b7f95242c82ee60a8c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function runs a self-test on the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> driver/device.  <a href="#ga08947cfedb541b7f95242c82ee60a8c5">More...</a><br/></td></tr>
<tr class="separator:ga08947cfedb541b7f95242c82ee60a8c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga00ae2fd009178f0fbdefc1764abdea0f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_hdmiphy1___config.html">XHdmiphy1_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga00ae2fd009178f0fbdefc1764abdea0f">XHdmiphy1_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:ga00ae2fd009178f0fbdefc1764abdea0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function looks for the device configuration based on the unique device ID.  <a href="#ga00ae2fd009178f0fbdefc1764abdea0f">More...</a><br/></td></tr>
<tr class="separator:ga00ae2fd009178f0fbdefc1764abdea0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa15dd35a9b1670aab091738d3ecca9df"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="struct_x_hdmiphy1___config.html">XHdmiphy1_Config</a> *CfgPtr)</td></tr>
<tr class="memdesc:gaa15dd35a9b1670aab091738d3ecca9df"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initializes the Video PHY for HDMI.  <a href="#gaa15dd35a9b1670aab091738d3ecca9df">More...</a><br/></td></tr>
<tr class="separator:gaa15dd35a9b1670aab091738d3ecca9df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga69e679f0c4444350910817be69cde77c"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga69e679f0c4444350910817be69cde77c">XHdmiphy1_SetHdmiTxParam</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XVidC_PixelsPerClock Ppc, XVidC_ColorDepth Bpc, XVidC_ColorFormat ColorFormat)</td></tr>
<tr class="memdesc:ga69e679f0c4444350910817be69cde77c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function update/set the HDMI TX parameter.  <a href="#ga69e679f0c4444350910817be69cde77c">More...</a><br/></td></tr>
<tr class="separator:ga69e679f0c4444350910817be69cde77c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2bf27809a22eecc5194a8bad16261280"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga2bf27809a22eecc5194a8bad16261280">XHdmiphy1_SetHdmiRxParam</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId)</td></tr>
<tr class="memdesc:ga2bf27809a22eecc5194a8bad16261280"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function update/set the HDMI RX parameter.  <a href="#ga2bf27809a22eecc5194a8bad16261280">More...</a><br/></td></tr>
<tr class="separator:ga2bf27809a22eecc5194a8bad16261280"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafa361514e8315c25876867a1ded2c99b"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gafa361514e8315c25876867a1ded2c99b">XHdmiphy1_HdmiCfgCalcMmcmParam</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir, XVidC_PixelsPerClock Ppc, XVidC_ColorDepth Bpc)</td></tr>
<tr class="memdesc:gafa361514e8315c25876867a1ded2c99b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function calculates the HDMI MMCM parameters.  <a href="#gafa361514e8315c25876867a1ded2c99b">More...</a><br/></td></tr>
<tr class="separator:gafa361514e8315c25876867a1ded2c99b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1d8702f582054727e5bafc4e6cf32739"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga1d8702f582054727e5bafc4e6cf32739">XHdmiphy1_HdmiUpdateClockSelection</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a> TxSysPllClkSel, <a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a> RxSysPllClkSel)</td></tr>
<tr class="memdesc:ga1d8702f582054727e5bafc4e6cf32739"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function Updates the HDMIPHY clocking.  <a href="#ga1d8702f582054727e5bafc4e6cf32739">More...</a><br/></td></tr>
<tr class="separator:ga1d8702f582054727e5bafc4e6cf32739"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac39e0926826a1e127514c8350ddcde21"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gac39e0926826a1e127514c8350ddcde21">XHdmiphy1_ClkDetFreqReset</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir)</td></tr>
<tr class="memdesc:gac39e0926826a1e127514c8350ddcde21"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function resets clock detector TX/RX frequency.  <a href="#gac39e0926826a1e127514c8350ddcde21">More...</a><br/></td></tr>
<tr class="separator:gac39e0926826a1e127514c8350ddcde21"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabb75647ab6dfd99febccba18593e86d8"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gabb75647ab6dfd99febccba18593e86d8">XHdmiphy1_ClkDetGetRefClkFreqHz</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, XHdmiphy1_DirectionType Dir)</td></tr>
<tr class="memdesc:gabb75647ab6dfd99febccba18593e86d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the frequency of the RX/TX reference clock as measured by the clock detector peripheral.  <a href="#gabb75647ab6dfd99febccba18593e86d8">More...</a><br/></td></tr>
<tr class="separator:gabb75647ab6dfd99febccba18593e86d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae2d190888890d12b1524b5d5065e5e57"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gae2d190888890d12b1524b5d5065e5e57">XHdmiphy1_DruGetRefClkFreqHz</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:gae2d190888890d12b1524b5d5065e5e57"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the frequency of the DRU reference clock as measured by the clock detector peripheral.  <a href="#gae2d190888890d12b1524b5d5065e5e57">More...</a><br/></td></tr>
<tr class="separator:gae2d190888890d12b1524b5d5065e5e57"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga16dfea31e43d9da2c4c00cd0785b6248"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga16dfea31e43d9da2c4c00cd0785b6248">XHdmiphy1_HdmiDebugInfo</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId)</td></tr>
<tr class="memdesc:ga16dfea31e43d9da2c4c00cd0785b6248"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints Video PHY debug information related to HDMI.  <a href="#ga16dfea31e43d9da2c4c00cd0785b6248">More...</a><br/></td></tr>
<tr class="separator:ga16dfea31e43d9da2c4c00cd0785b6248"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga64e64512cb8f987620763078fe9e796d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga64e64512cb8f987620763078fe9e796d">XHdmiphy1_SetHdmiCallback</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, <a class="el" href="group__xhdmiphy1.html#ga8df8a80a15683dd3ffe31d80780f6329">XHdmiphy1_HdmiHandlerType</a> HandlerType, void *CallbackFunc, void *CallbackRef)</td></tr>
<tr class="memdesc:ga64e64512cb8f987620763078fe9e796d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function installs an HDMI callback function for the specified handler type.  <a href="#ga64e64512cb8f987620763078fe9e796d">More...</a><br/></td></tr>
<tr class="separator:ga64e64512cb8f987620763078fe9e796d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1e17b8f3099b9edb96bdf732671b7efc"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga1e17b8f3099b9edb96bdf732671b7efc">XHdmiphy1_Hdmi20Config</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir)</td></tr>
<tr class="memdesc:ga1e17b8f3099b9edb96bdf732671b7efc"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will configure the HDMIPHY to HDMI 2.0 mode.  <a href="#ga1e17b8f3099b9edb96bdf732671b7efc">More...</a><br/></td></tr>
<tr class="separator:ga1e17b8f3099b9edb96bdf732671b7efc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2aa401218d0bc4c64c2210f85ccee457"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, u64 LineRate, u8 NChannels)</td></tr>
<tr class="memdesc:ga2aa401218d0bc4c64c2210f85ccee457"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will configure the GT for HDMI 2.1 operation.  <a href="#ga2aa401218d0bc4c64c2210f85ccee457">More...</a><br/></td></tr>
<tr class="separator:ga2aa401218d0bc4c64c2210f85ccee457"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8dc19df05e15d413e62ff62d2c22c023"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga8dc19df05e15d413e62ff62d2c22c023">XHdmiphy1_RegisterDebug</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga8dc19df05e15d413e62ff62d2c22c023"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints out Video PHY register and GT Channel and Common DRP register contents.  <a href="#ga8dc19df05e15d413e62ff62d2c22c023">More...</a><br/></td></tr>
<tr class="separator:ga8dc19df05e15d413e62ff62d2c22c023"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab2369998b0e4635bced93881e51cc8fe"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gab2369998b0e4635bced93881e51cc8fe">XHdmiphy1_ClkDetEnable</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 Enable)</td></tr>
<tr class="memdesc:gab2369998b0e4635bced93881e51cc8fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the HDMIPHY's detector peripheral.  <a href="#gab2369998b0e4635bced93881e51cc8fe">More...</a><br/></td></tr>
<tr class="separator:gab2369998b0e4635bced93881e51cc8fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac2f877b2581399c3344d1555d05df2df"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gac2f877b2581399c3344d1555d05df2df">XHdmiphy1_ClkDetTimerClear</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir)</td></tr>
<tr class="memdesc:gac2f877b2581399c3344d1555d05df2df"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clears the clock detector TX/RX timer.  <a href="#gac2f877b2581399c3344d1555d05df2df">More...</a><br/></td></tr>
<tr class="separator:gac2f877b2581399c3344d1555d05df2df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5a055146c6b3aa1da1991a0041dc11f7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga5a055146c6b3aa1da1991a0041dc11f7">XHdmiphy1_ClkDetSetFreqLockThreshold</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u16 ThresholdVal)</td></tr>
<tr class="memdesc:ga5a055146c6b3aa1da1991a0041dc11f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the clock detector frequency lock counter threshold value.  <a href="#ga5a055146c6b3aa1da1991a0041dc11f7">More...</a><br/></td></tr>
<tr class="separator:ga5a055146c6b3aa1da1991a0041dc11f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa113dd9ce96c346ef9b757947eb340fe"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaa113dd9ce96c346ef9b757947eb340fe">XHdmiphy1_ClkDetAccuracyRange</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u16 ThresholdVal)</td></tr>
<tr class="memdesc:gaa113dd9ce96c346ef9b757947eb340fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the clock detector accuracy range value.  <a href="#gaa113dd9ce96c346ef9b757947eb340fe">More...</a><br/></td></tr>
<tr class="separator:gaa113dd9ce96c346ef9b757947eb340fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafaece55136a95db26cf37edcd53c96f8"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gafaece55136a95db26cf37edcd53c96f8">XHdmiphy1_ClkDetCheckFreqZero</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, XHdmiphy1_DirectionType Dir)</td></tr>
<tr class="memdesc:gafaece55136a95db26cf37edcd53c96f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks clock detector RX/TX frequency zero indicator bit.  <a href="#gafaece55136a95db26cf37edcd53c96f8">More...</a><br/></td></tr>
<tr class="separator:gafaece55136a95db26cf37edcd53c96f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga46cb7e8a6cc10a61bbfb7126f85e8cec"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga46cb7e8a6cc10a61bbfb7126f85e8cec">XHdmiphy1_ClkDetSetFreqTimeout</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u32 TimeoutVal)</td></tr>
<tr class="memdesc:ga46cb7e8a6cc10a61bbfb7126f85e8cec"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets clock detector frequency lock counter threshold value.  <a href="#ga46cb7e8a6cc10a61bbfb7126f85e8cec">More...</a><br/></td></tr>
<tr class="separator:ga46cb7e8a6cc10a61bbfb7126f85e8cec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacbffa1bd1304f2f69a32aa1a22573052"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gacbffa1bd1304f2f69a32aa1a22573052">XHdmiphy1_ClkDetTimerLoad</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, u32 TimeoutVal)</td></tr>
<tr class="memdesc:gacbffa1bd1304f2f69a32aa1a22573052"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function loads the timer to TX/RX in the clock detector.  <a href="#gacbffa1bd1304f2f69a32aa1a22573052">More...</a><br/></td></tr>
<tr class="separator:gacbffa1bd1304f2f69a32aa1a22573052"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5ccf265013fcb1e013775dc9a8563c87"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga5ccf265013fcb1e013775dc9a8563c87">XHdmiphy1_DruReset</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u8 Reset)</td></tr>
<tr class="memdesc:ga5ccf265013fcb1e013775dc9a8563c87"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function resets the DRU in the HDMIPHY.  <a href="#ga5ccf265013fcb1e013775dc9a8563c87">More...</a><br/></td></tr>
<tr class="separator:ga5ccf265013fcb1e013775dc9a8563c87"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7b7a69d580eaac17960b977851aead25"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga7b7a69d580eaac17960b977851aead25">XHdmiphy1_DruEnable</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u8 Enable)</td></tr>
<tr class="memdesc:ga7b7a69d580eaac17960b977851aead25"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enabled/disables the DRU in the HDMIPHY.  <a href="#ga7b7a69d580eaac17960b977851aead25">More...</a><br/></td></tr>
<tr class="separator:ga7b7a69d580eaac17960b977851aead25"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab5da59924fa5189f7141d950e6d31a50"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gab5da59924fa5189f7141d950e6d31a50">XHdmiphy1_DruGetVersion</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:gab5da59924fa5189f7141d950e6d31a50"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the DRU version.  <a href="#gab5da59924fa5189f7141d950e6d31a50">More...</a><br/></td></tr>
<tr class="separator:gab5da59924fa5189f7141d950e6d31a50"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga02899710d93b44ffa5d6f87637d67809"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga02899710d93b44ffa5d6f87637d67809">XHdmiphy1_DruSetCenterFreqHz</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u64 CenterFreqHz)</td></tr>
<tr class="memdesc:ga02899710d93b44ffa5d6f87637d67809"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the DRU center frequency.  <a href="#ga02899710d93b44ffa5d6f87637d67809">More...</a><br/></td></tr>
<tr class="separator:ga02899710d93b44ffa5d6f87637d67809"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4c7a948926fede8a6548c6cffe5fc830"><td class="memItemLeft" align="right" valign="top">u64&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga4c7a948926fede8a6548c6cffe5fc830">XHdmiphy1_DruCalcCenterFreqHz</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId)</td></tr>
<tr class="memdesc:ga4c7a948926fede8a6548c6cffe5fc830"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function calculates the center frequency value for the DRU.  <a href="#ga4c7a948926fede8a6548c6cffe5fc830">More...</a><br/></td></tr>
<tr class="separator:ga4c7a948926fede8a6548c6cffe5fc830"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae9070f7158ccb8538edf80a5ec4c8da6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gae9070f7158ccb8538edf80a5ec4c8da6">XHdmiphy1_HdmiGtDruModeEnable</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 Enable)</td></tr>
<tr class="memdesc:gae9070f7158ccb8538edf80a5ec4c8da6"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the GT RX CDR and Equalization for DRU mode.  <a href="#gae9070f7158ccb8538edf80a5ec4c8da6">More...</a><br/></td></tr>
<tr class="separator:gae9070f7158ccb8538edf80a5ec4c8da6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga51d10d93fa76ebe0c031600b61955d4d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga51d10d93fa76ebe0c031600b61955d4d">XHdmiphy1_PatgenSetRatio</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, u64 TxLineRate)</td></tr>
<tr class="memdesc:ga51d10d93fa76ebe0c031600b61955d4d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the Pattern Generator for the GT Channel 4 when it is used to generate the TX TMDS Clock.  <a href="#ga51d10d93fa76ebe0c031600b61955d4d">More...</a><br/></td></tr>
<tr class="separator:ga51d10d93fa76ebe0c031600b61955d4d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe6529e3429c7199f87f7f8fc7f43fe0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gafe6529e3429c7199f87f7f8fc7f43fe0">XHdmiphy1_PatgenEnable</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, u8 Enable)</td></tr>
<tr class="memdesc:gafe6529e3429c7199f87f7f8fc7f43fe0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables or disables the Pattern Generator for the GT Channel 4 when it isused to generate the TX TMDS Clock.  <a href="#gafe6529e3429c7199f87f7f8fc7f43fe0">More...</a><br/></td></tr>
<tr class="separator:gafe6529e3429c7199f87f7f8fc7f43fe0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1f26c79a098ddb33f610f5a88efc140e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga1f26c79a098ddb33f610f5a88efc140e">XHdmiphy1_HdmiIntrHandlerCallbackInit</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga1f26c79a098ddb33f610f5a88efc140e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the appropriate HDMI interupt handlers.  <a href="#ga1f26c79a098ddb33f610f5a88efc140e">More...</a><br/></td></tr>
<tr class="separator:ga1f26c79a098ddb33f610f5a88efc140e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga70ecb3c5614ea8c97c0bc56bd395ac2c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u8 *Id0, u8 *Id1)</td></tr>
<tr class="memdesc:ga70ecb3c5614ea8c97c0bc56bd395ac2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will set the channel IDs to correspond with the supplied channel ID based on the protocol.  <a href="#ga70ecb3c5614ea8c97c0bc56bd395ac2c">More...</a><br/></td></tr>
<tr class="separator:ga70ecb3c5614ea8c97c0bc56bd395ac2c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacfaf4756f5682dfda2739a8083deea56"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gacfaf4756f5682dfda2739a8083deea56">XHdmiphy1_DirReconfig</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir)</td></tr>
<tr class="memdesc:gacfaf4756f5682dfda2739a8083deea56"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will set the current RX/TX configuration over DRP.  <a href="#gacfaf4756f5682dfda2739a8083deea56">More...</a><br/></td></tr>
<tr class="separator:gacfaf4756f5682dfda2739a8083deea56"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27c96bba79f91125a226948b139fe9d3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga27c96bba79f91125a226948b139fe9d3">XHdmiphy1_Pll2SysClkData</a> (<a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a> PllSelect)</td></tr>
<tr class="memdesc:ga27c96bba79f91125a226948b139fe9d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will translate from XHdmiphy1_PllType to XHdmiphy1_SysClkDataSelType.  <a href="#ga27c96bba79f91125a226948b139fe9d3">More...</a><br/></td></tr>
<tr class="separator:ga27c96bba79f91125a226948b139fe9d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad369e0c6d06d2f66606c845b3976fe75"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__xhdmiphy1.html#gac87909fabb3f765c0be156e7082aea8e">XHdmiphy1_SysClkOutSelType</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gad369e0c6d06d2f66606c845b3976fe75">XHdmiphy1_Pll2SysClkOut</a> (<a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a> PllSelect)</td></tr>
<tr class="memdesc:gad369e0c6d06d2f66606c845b3976fe75"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will translate from XHdmiphy1_PllType to XHdmiphy1_SysClkOutSelType.  <a href="#gad369e0c6d06d2f66606c845b3976fe75">More...</a><br/></td></tr>
<tr class="separator:gad369e0c6d06d2f66606c845b3976fe75"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga87f9523a81f1b648cfae0172bdd96f0b"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga87f9523a81f1b648cfae0172bdd96f0b">XHdmiphy1_PllCalculator</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir, u32 PllClkInFreqHz)</td></tr>
<tr class="memdesc:ga87f9523a81f1b648cfae0172bdd96f0b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will try to find the necessary PLL divisor values to produce the configured line rate given the specified PLL input frequency.  <a href="#ga87f9523a81f1b648cfae0172bdd96f0b">More...</a><br/></td></tr>
<tr class="separator:ga87f9523a81f1b648cfae0172bdd96f0b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0fa2836b8aac17e187bf1e01a462001a"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga0fa2836b8aac17e187bf1e01a462001a">XHdmiphy1_WriteCfgRefClkSelReg</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId)</td></tr>
<tr class="memdesc:ga0fa2836b8aac17e187bf1e01a462001a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function writes the current software configuration for the reference clock selections to hardware for the specified quad on all channels.  <a href="#ga0fa2836b8aac17e187bf1e01a462001a">More...</a><br/></td></tr>
<tr class="separator:ga0fa2836b8aac17e187bf1e01a462001a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf3cb368774462d22b085a8e34d2c7a00"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaf3cb368774462d22b085a8e34d2c7a00">XHdmiphy1_CfgPllRefClkSel</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, <a class="el" href="group__xhdmiphy1.html#gaec55cf3dfcfa0c7cf9749c63690dd019">XHdmiphy1_PllRefClkSelType</a> RefClkSel)</td></tr>
<tr class="memdesc:gaf3cb368774462d22b085a8e34d2c7a00"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure the PLL reference clock selection for the specified channel(s).  <a href="#gaf3cb368774462d22b085a8e34d2c7a00">More...</a><br/></td></tr>
<tr class="separator:gaf3cb368774462d22b085a8e34d2c7a00"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4e6b72ef1579950b4c8c83e35e7ad4b0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga4e6b72ef1579950b4c8c83e35e7ad4b0">XHdmiphy1_CfgSysClkDataSel</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, <a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a> SysClkDataSel)</td></tr>
<tr class="memdesc:ga4e6b72ef1579950b4c8c83e35e7ad4b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure the SYSCLKDATA reference clock selection for the direction.  <a href="#ga4e6b72ef1579950b4c8c83e35e7ad4b0">More...</a><br/></td></tr>
<tr class="separator:ga4e6b72ef1579950b4c8c83e35e7ad4b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga738210e1c11e69176f1cd733ff0bae6c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga738210e1c11e69176f1cd733ff0bae6c">XHdmiphy1_CfgSysClkOutSel</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, <a class="el" href="group__xhdmiphy1.html#gac87909fabb3f765c0be156e7082aea8e">XHdmiphy1_SysClkOutSelType</a> SysClkOutSel)</td></tr>
<tr class="memdesc:ga738210e1c11e69176f1cd733ff0bae6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure the SYSCLKOUT reference clock selection for the direction.  <a href="#ga738210e1c11e69176f1cd733ff0bae6c">More...</a><br/></td></tr>
<tr class="separator:ga738210e1c11e69176f1cd733ff0bae6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad8f3d6250fe7c2d7384a5f20507da509"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gad8f3d6250fe7c2d7384a5f20507da509">XHdmiphy1_ClkCalcParams</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir, u32 PllClkInFreqHz)</td></tr>
<tr class="memdesc:gad8f3d6250fe7c2d7384a5f20507da509"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will try to find the necessary PLL divisor values to produce the configured line rate given the specified PLL input frequency.  <a href="#gad8f3d6250fe7c2d7384a5f20507da509">More...</a><br/></td></tr>
<tr class="separator:gad8f3d6250fe7c2d7384a5f20507da509"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga03e2d2bdcf56e256ff08f5776313a76e"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga03e2d2bdcf56e256ff08f5776313a76e">XHdmiphy1_OutDivReconfig</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir)</td></tr>
<tr class="memdesc:ga03e2d2bdcf56e256ff08f5776313a76e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will set the current output divider configuration over DRP.  <a href="#ga03e2d2bdcf56e256ff08f5776313a76e">More...</a><br/></td></tr>
<tr class="separator:ga03e2d2bdcf56e256ff08f5776313a76e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeb31d823a71bad5b0bb6250b016577d7"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaeb31d823a71bad5b0bb6250b016577d7">XHdmiphy1_ClkReconfig</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId)</td></tr>
<tr class="memdesc:gaeb31d823a71bad5b0bb6250b016577d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will set the current clocking settings for each channel to hardware based on the configuration stored in the driver's instance.  <a href="#gaeb31d823a71bad5b0bb6250b016577d7">More...</a><br/></td></tr>
<tr class="separator:gaeb31d823a71bad5b0bb6250b016577d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf524ddfb56aa7742cf9c7fc777a2273a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaf524ddfb56aa7742cf9c7fc777a2273a">XHdmiphy1_GetRcfgChId</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, <a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a> PllType)</td></tr>
<tr class="memdesc:gaf524ddfb56aa7742cf9c7fc777a2273a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Obtain the reconfiguration channel ID for given PLL type.  <a href="#gaf524ddfb56aa7742cf9c7fc777a2273a">More...</a><br/></td></tr>
<tr class="separator:gaf524ddfb56aa7742cf9c7fc777a2273a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac05b90ab984e726f1ddde5cf265915d9"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gac05b90ab984e726f1ddde5cf265915d9">XHdmiphy1_IsPllLocked</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId)</td></tr>
<tr class="memdesc:gac05b90ab984e726f1ddde5cf265915d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will check the status of a PLL lock on the specified channel.  <a href="#gac05b90ab984e726f1ddde5cf265915d9">More...</a><br/></td></tr>
<tr class="separator:gac05b90ab984e726f1ddde5cf265915d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa8cf29813f43a1066492adea335bf48"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaaa8cf29813f43a1066492adea335bf48">XHdmiphy1_GetQuadRefClkFreq</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#gaec55cf3dfcfa0c7cf9749c63690dd019">XHdmiphy1_PllRefClkSelType</a> RefClkType)</td></tr>
<tr class="memdesc:gaaa8cf29813f43a1066492adea335bf48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Obtain the current reference clock frequency for the quad based on the reference clock type.  <a href="#gaaa8cf29813f43a1066492adea335bf48">More...</a><br/></td></tr>
<tr class="separator:gaaa8cf29813f43a1066492adea335bf48"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa91560e5b99db9d90042b548a76da7a6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaa91560e5b99db9d90042b548a76da7a6">XHdmiphy1_GetSysClkDataSel</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId)</td></tr>
<tr class="memdesc:gaa91560e5b99db9d90042b548a76da7a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Obtain the current [RT]XSYSCLKSEL[0] configuration.  <a href="#gaa91560e5b99db9d90042b548a76da7a6">More...</a><br/></td></tr>
<tr class="separator:gaa91560e5b99db9d90042b548a76da7a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf0e7c8a542401ba275640fabee19940"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__xhdmiphy1.html#gac87909fabb3f765c0be156e7082aea8e">XHdmiphy1_SysClkOutSelType</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gabf0e7c8a542401ba275640fabee19940">XHdmiphy1_GetSysClkOutSel</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId)</td></tr>
<tr class="memdesc:gabf0e7c8a542401ba275640fabee19940"><td class="mdescLeft">&#160;</td><td class="mdescRight">Obtain the current [RT]XSYSCLKSEL[1] configuration.  <a href="#gabf0e7c8a542401ba275640fabee19940">More...</a><br/></td></tr>
<tr class="separator:gabf0e7c8a542401ba275640fabee19940"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaff834a7a15854c09af35144299a4f980"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaff834a7a15854c09af35144299a4f980">XHdmiphy1_GtUserRdyEnable</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir, u8 Hold)</td></tr>
<tr class="memdesc:gaff834a7a15854c09af35144299a4f980"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will reset and enable the Video PHY's user core logic.  <a href="#gaff834a7a15854c09af35144299a4f980">More...</a><br/></td></tr>
<tr class="separator:gaff834a7a15854c09af35144299a4f980"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga47707c2203c7788afdfb22fe1ae438db"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga47707c2203c7788afdfb22fe1ae438db">XHdmiphy1_MmcmReset</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, u8 Hold)</td></tr>
<tr class="memdesc:ga47707c2203c7788afdfb22fe1ae438db"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will reset the mixed-mode clock manager (MMCM) core.  <a href="#ga47707c2203c7788afdfb22fe1ae438db">More...</a><br/></td></tr>
<tr class="separator:ga47707c2203c7788afdfb22fe1ae438db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6d652ca1a4650bc5a2762d381a110f6b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga6d652ca1a4650bc5a2762d381a110f6b">XHdmiphy1_MmcmLockedMaskEnable</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, u8 Enable)</td></tr>
<tr class="memdesc:ga6d652ca1a4650bc5a2762d381a110f6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will reset the mixed-mode clock manager (MMCM) core.  <a href="#ga6d652ca1a4650bc5a2762d381a110f6b">More...</a><br/></td></tr>
<tr class="separator:ga6d652ca1a4650bc5a2762d381a110f6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0b46b7c2c9c6d5fbe7e7c2a6d226b985"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga0b46b7c2c9c6d5fbe7e7c2a6d226b985">XHdmiphy1_MmcmLocked</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir)</td></tr>
<tr class="memdesc:ga0b46b7c2c9c6d5fbe7e7c2a6d226b985"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will get the lock status of the mixed-mode clock manager (MMCM) core.  <a href="#ga0b46b7c2c9c6d5fbe7e7c2a6d226b985">More...</a><br/></td></tr>
<tr class="separator:ga0b46b7c2c9c6d5fbe7e7c2a6d226b985"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2b93ca125219d62f19817168267ddfc5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga2b93ca125219d62f19817168267ddfc5">XHdmiphy1_MmcmSetClkinsel</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, XHdmiphy1_MmcmClkinsel Sel)</td></tr>
<tr class="memdesc:ga2b93ca125219d62f19817168267ddfc5"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will set the CLKINSEL port of the MMCM.  <a href="#ga2b93ca125219d62f19817168267ddfc5">More...</a><br/></td></tr>
<tr class="separator:ga2b93ca125219d62f19817168267ddfc5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafb115f999643adac66932d6c4a44de1c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gafb115f999643adac66932d6c4a44de1c">XHdmiphy1_SetBufgGtDiv</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, XHdmiphy1_DirectionType Dir, u8 Div)</td></tr>
<tr class="memdesc:gafb115f999643adac66932d6c4a44de1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function obtains the divider value of the BUFG_GT peripheral.  <a href="#gafb115f999643adac66932d6c4a44de1c">More...</a><br/></td></tr>
<tr class="separator:gafb115f999643adac66932d6c4a44de1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf1fbb7de9d26abab7332a62932be9d85"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaf1fbb7de9d26abab7332a62932be9d85">XHdmiphy1_PowerDownGtPll</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, u8 Hold)</td></tr>
<tr class="memdesc:gaf1fbb7de9d26abab7332a62932be9d85"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will power down the specified GT PLL.  <a href="#gaf1fbb7de9d26abab7332a62932be9d85">More...</a><br/></td></tr>
<tr class="separator:gaf1fbb7de9d26abab7332a62932be9d85"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaed8eb9b3c3f96343f4358c9d54296af0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaed8eb9b3c3f96343f4358c9d54296af0">XHdmiphy1_SetIntrHandler</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, <a class="el" href="group__xhdmiphy1.html#ga0babc37b8b55084caeefe57eef4fbd62">XHdmiphy1_IntrHandlerType</a> HandlerType, <a class="el" href="group__xhdmiphy1.html#ga5ff00002844b75068ea21b03514fcf04">XHdmiphy1_IntrHandler</a> CallbackFunc, void *CallbackRef)</td></tr>
<tr class="memdesc:gaed8eb9b3c3f96343f4358c9d54296af0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function installs a callback function for the specified handler type.  <a href="#gaed8eb9b3c3f96343f4358c9d54296af0">More...</a><br/></td></tr>
<tr class="separator:gaed8eb9b3c3f96343f4358c9d54296af0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf1923a89392fcc152f571818d2ad564f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaf1923a89392fcc152f571818d2ad564f">XHdmiphy1_IntrEnable</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, <a class="el" href="group__xhdmiphy1.html#ga0babc37b8b55084caeefe57eef4fbd62">XHdmiphy1_IntrHandlerType</a> Intr)</td></tr>
<tr class="memdesc:gaf1923a89392fcc152f571818d2ad564f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables interrupts associated with the specified interrupt type.  <a href="#gaf1923a89392fcc152f571818d2ad564f">More...</a><br/></td></tr>
<tr class="separator:gaf1923a89392fcc152f571818d2ad564f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabb09df5f9b1e2f799160dd944d8ae935"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gabb09df5f9b1e2f799160dd944d8ae935">XHdmiphy1_IntrDisable</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, <a class="el" href="group__xhdmiphy1.html#ga0babc37b8b55084caeefe57eef4fbd62">XHdmiphy1_IntrHandlerType</a> Intr)</td></tr>
<tr class="memdesc:gabb09df5f9b1e2f799160dd944d8ae935"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function disabled interrupts associated with the specified interrupt type.  <a href="#gabb09df5f9b1e2f799160dd944d8ae935">More...</a><br/></td></tr>
<tr class="separator:gabb09df5f9b1e2f799160dd944d8ae935"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7cd4d4f88631190ea51009300a15b783"><td class="memItemLeft" align="right" valign="top">u64&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga7cd4d4f88631190ea51009300a15b783">XHdmiphy1_GetPllVcoFreqHz</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, u8 QuadId, <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> ChId, XHdmiphy1_DirectionType Dir)</td></tr>
<tr class="memdesc:ga7cd4d4f88631190ea51009300a15b783"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function calculates the PLL VCO operating frequency.  <a href="#ga7cd4d4f88631190ea51009300a15b783">More...</a><br/></td></tr>
<tr class="separator:ga7cd4d4f88631190ea51009300a15b783"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga22de3338657208e2ee991d68f0248195"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga22de3338657208e2ee991d68f0248195">XHdmiphy1_GetRefClkSourcesCount</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga22de3338657208e2ee991d68f0248195"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the number of active reference clock sources based in the CFG.  <a href="#ga22de3338657208e2ee991d68f0248195">More...</a><br/></td></tr>
<tr class="separator:ga22de3338657208e2ee991d68f0248195"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab75f3892f884d01f855d607291eba269"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gab75f3892f884d01f855d607291eba269">XHdmiphy1_IsHDMI</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr, XHdmiphy1_DirectionType Dir)</td></tr>
<tr class="memdesc:gab75f3892f884d01f855d607291eba269"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks if Instance is HDMI 2.0 or HDMI 2.1.  <a href="#gab75f3892f884d01f855d607291eba269">More...</a><br/></td></tr>
<tr class="separator:gab75f3892f884d01f855d607291eba269"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gada0844e8a6a828bb7d512259aca11498"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:gada0844e8a6a828bb7d512259aca11498"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the handler for TX timer timeout events.  <a href="#gada0844e8a6a828bb7d512259aca11498">More...</a><br/></td></tr>
<tr class="separator:gada0844e8a6a828bb7d512259aca11498"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5a0a82f90d7a0f1c4c8180cfb465de0a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga5a0a82f90d7a0f1c4c8180cfb465de0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the handler for RX timer timeout events.  <a href="#ga5a0a82f90d7a0f1c4c8180cfb465de0a">More...</a><br/></td></tr>
<tr class="separator:ga5a0a82f90d7a0f1c4c8180cfb465de0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3fc9cb2326efad44689d4af163343b7f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga3fc9cb2326efad44689d4af163343b7f">XHdmiphy1_ErrorHandler</a> (<a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga3fc9cb2326efad44689d4af163343b7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the error condition handler.  <a href="#ga3fc9cb2326efad44689d4af163343b7f">More...</a><br/></td></tr>
<tr class="separator:ga3fc9cb2326efad44689d4af163343b7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
HDMIPHY core registers: General registers.</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpec15c4ebb21ab3fccb0e1fa40da442dd"></a>Address mapping for the Video PHY core. </p>
</td></tr>
<tr class="memitem:ga189af8d011b364b664a7b0645e73a51a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga189af8d011b364b664a7b0645e73a51a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_VERSION_REG</b>&#160;&#160;&#160;0x000</td></tr>
<tr class="separator:ga189af8d011b364b664a7b0645e73a51a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabac4893c156df4f5ef3adf1dceeab18d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabac4893c156df4f5ef3adf1dceeab18d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BANK_SELECT_REG</b>&#160;&#160;&#160;0x00C</td></tr>
<tr class="separator:gabac4893c156df4f5ef3adf1dceeab18d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga90ea3a00f2f107483b32a618e0cb7161"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga90ea3a00f2f107483b32a618e0cb7161"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_REG</b>&#160;&#160;&#160;0x010</td></tr>
<tr class="separator:ga90ea3a00f2f107483b32a618e0cb7161"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaec13c032402e94c3adb52b31bb07341d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaec13c032402e94c3adb52b31bb07341d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_RESET_REG</b>&#160;&#160;&#160;0x014</td></tr>
<tr class="separator:gaec13c032402e94c3adb52b31bb07341d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9c876dcf8c18f42b129be0d00340d05f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9c876dcf8c18f42b129be0d00340d05f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_COMMON_INIT_REG</b>&#160;&#160;&#160;0x014</td></tr>
<tr class="separator:ga9c876dcf8c18f42b129be0d00340d05f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac10cb297f239a7d88a806e6599171dd1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac10cb297f239a7d88a806e6599171dd1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_REG</b>&#160;&#160;&#160;0x018</td></tr>
<tr class="separator:gac10cb297f239a7d88a806e6599171dd1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga406f748904012669294775af01463bbe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga406f748904012669294775af01463bbe"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_INIT_REG</b>&#160;&#160;&#160;0x01C</td></tr>
<tr class="separator:ga406f748904012669294775af01463bbe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga40936c0f6e9ae29208dffe5389298d46"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga40936c0f6e9ae29208dffe5389298d46"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_INIT_STATUS_REG</b>&#160;&#160;&#160;0x020</td></tr>
<tr class="separator:ga40936c0f6e9ae29208dffe5389298d46"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8431208fbc8da1febe63d78706e4f97b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8431208fbc8da1febe63d78706e4f97b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_INIT_REG</b>&#160;&#160;&#160;0x024</td></tr>
<tr class="separator:ga8431208fbc8da1febe63d78706e4f97b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga95ab47e5ac1530714d6ed038c0b9cf86"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga95ab47e5ac1530714d6ed038c0b9cf86"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_INIT_STATUS_REG</b>&#160;&#160;&#160;0x028</td></tr>
<tr class="separator:ga95ab47e5ac1530714d6ed038c0b9cf86"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf536d663bfec424c540a1cd522c5f5e7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf536d663bfec424c540a1cd522c5f5e7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_IBUFDS_GTXX_CTRL_REG</b>&#160;&#160;&#160;0x02C</td></tr>
<tr class="separator:gaf536d663bfec424c540a1cd522c5f5e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gade53cfc74a69cfea64dc463bbda2f3bc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gade53cfc74a69cfea64dc463bbda2f3bc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_REG</b>&#160;&#160;&#160;0x030</td></tr>
<tr class="separator:gade53cfc74a69cfea64dc463bbda2f3bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafc2648e5738c6f8cd68a7b54b4ce8c6b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafc2648e5738c6f8cd68a7b54b4ce8c6b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_LOOPBACK_CONTROL_REG</b>&#160;&#160;&#160;0x038</td></tr>
<tr class="separator:gafc2648e5738c6f8cd68a7b54b4ce8c6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
HDMIPHY core registers: Dynamic reconfiguration port (DRP) registers.</h2></td></tr>
<tr class="memitem:gacadd55613dcc2705f4cedef2337c63d0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacadd55613dcc2705f4cedef2337c63d0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_CH1_REG</b>&#160;&#160;&#160;0x040</td></tr>
<tr class="separator:gacadd55613dcc2705f4cedef2337c63d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6a2d0637e62c0a6fddaa360d7081f9e5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6a2d0637e62c0a6fddaa360d7081f9e5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_CH2_REG</b>&#160;&#160;&#160;0x044</td></tr>
<tr class="separator:ga6a2d0637e62c0a6fddaa360d7081f9e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd0f4e636dce4bf28daded3d723f88a7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafd0f4e636dce4bf28daded3d723f88a7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_CH3_REG</b>&#160;&#160;&#160;0x048</td></tr>
<tr class="separator:gafd0f4e636dce4bf28daded3d723f88a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4b4513b035a74ccda69754ddbf611886"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4b4513b035a74ccda69754ddbf611886"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_CH4_REG</b>&#160;&#160;&#160;0x04C</td></tr>
<tr class="separator:ga4b4513b035a74ccda69754ddbf611886"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab964671e5ea1ed07bdb63551bfa6d770"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab964671e5ea1ed07bdb63551bfa6d770"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_CH1_REG</b>&#160;&#160;&#160;0x050</td></tr>
<tr class="separator:gab964671e5ea1ed07bdb63551bfa6d770"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf246b9393c8092e6b5a4e132f167e9cd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf246b9393c8092e6b5a4e132f167e9cd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_CH2_REG</b>&#160;&#160;&#160;0x054</td></tr>
<tr class="separator:gaf246b9393c8092e6b5a4e132f167e9cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaadd719910c3a96028c5805b60dc8aea9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaadd719910c3a96028c5805b60dc8aea9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_CH3_REG</b>&#160;&#160;&#160;0x058</td></tr>
<tr class="separator:gaadd719910c3a96028c5805b60dc8aea9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga83eb1458de28e3c6a4791523748c2d96"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga83eb1458de28e3c6a4791523748c2d96"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_CH4_REG</b>&#160;&#160;&#160;0x05C</td></tr>
<tr class="separator:ga83eb1458de28e3c6a4791523748c2d96"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga500ff1afc511575d681882ce14c9e730"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga500ff1afc511575d681882ce14c9e730"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_COMMON_REG</b>&#160;&#160;&#160;0x060</td></tr>
<tr class="separator:ga500ff1afc511575d681882ce14c9e730"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac2bfa8ffbe17ea7b61331c3b242c777d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac2bfa8ffbe17ea7b61331c3b242c777d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_COMMON_REG</b>&#160;&#160;&#160;0x064</td></tr>
<tr class="separator:gac2bfa8ffbe17ea7b61331c3b242c777d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4b023fdb9b658c88fb0e5626b529b627"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4b023fdb9b658c88fb0e5626b529b627"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_TXMMCM_REG</b>&#160;&#160;&#160;0x124</td></tr>
<tr class="separator:ga4b023fdb9b658c88fb0e5626b529b627"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6b37ddebf656d0691814822f1515ca7c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6b37ddebf656d0691814822f1515ca7c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_TXMMCM_REG</b>&#160;&#160;&#160;0x128</td></tr>
<tr class="separator:ga6b37ddebf656d0691814822f1515ca7c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga09155620fcb5f23a66e739b9fec928b0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga09155620fcb5f23a66e739b9fec928b0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_RXMMCM_REG</b>&#160;&#160;&#160;0x144</td></tr>
<tr class="separator:ga09155620fcb5f23a66e739b9fec928b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad507d00200c3e55fe41c0d4ff85925f7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad507d00200c3e55fe41c0d4ff85925f7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_RXMMCM_REG</b>&#160;&#160;&#160;0x148</td></tr>
<tr class="separator:gad507d00200c3e55fe41c0d4ff85925f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
HDMIPHY core registers: CPLL Calibration registers.</h2></td></tr>
<tr class="memitem:ga5e63115719a037fe2e3143d79846756f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5e63115719a037fe2e3143d79846756f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CPLL_CAL_PERIOD_REG</b>&#160;&#160;&#160;0x068</td></tr>
<tr class="separator:ga5e63115719a037fe2e3143d79846756f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaba2eac3c7b7f3bd75427f34e16d9d7bd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaba2eac3c7b7f3bd75427f34e16d9d7bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CPLL_CAL_TOL_REG</b>&#160;&#160;&#160;0x06C</td></tr>
<tr class="separator:gaba2eac3c7b7f3bd75427f34e16d9d7bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
HDMIPHY core registers: GT Debug INTF registers.</h2></td></tr>
<tr class="memitem:ga8866b52204638892e9de96cfd542e7e9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8866b52204638892e9de96cfd542e7e9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_GT_DBG_GPI_REG</b>&#160;&#160;&#160;0x068</td></tr>
<tr class="separator:ga8866b52204638892e9de96cfd542e7e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5e5f4d4f09f0b6889bdc9ecd7ebcd963"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5e5f4d4f09f0b6889bdc9ecd7ebcd963"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_GT_DBG_GPO_REG</b>&#160;&#160;&#160;0x06C</td></tr>
<tr class="separator:ga5e5f4d4f09f0b6889bdc9ecd7ebcd963"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
HDMIPHY core registers: Transmitter function registers.</h2></td></tr>
<tr class="memitem:gad6c225d9f93ec0ae4125fafdf6ad4d3e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad6c225d9f93ec0ae4125fafdf6ad4d3e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_REG</b>&#160;&#160;&#160;0x070</td></tr>
<tr class="separator:gad6c225d9f93ec0ae4125fafdf6ad4d3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf01271084cda22defb751c11fc7b9fbb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf01271084cda22defb751c11fc7b9fbb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_REG</b>&#160;&#160;&#160;0x074</td></tr>
<tr class="separator:gaf01271084cda22defb751c11fc7b9fbb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab52a71c2cae90ae6a2cc5fcdba3b0efa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab52a71c2cae90ae6a2cc5fcdba3b0efa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_REG</b>&#160;&#160;&#160;0x078</td></tr>
<tr class="separator:gab52a71c2cae90ae6a2cc5fcdba3b0efa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga230158ee5c10304029c24c8ffb0928c0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga230158ee5c10304029c24c8ffb0928c0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_CH12_REG</b>&#160;&#160;&#160;0x07C</td></tr>
<tr class="separator:ga230158ee5c10304029c24c8ffb0928c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8c3e4b15d8cf85eb2ecb6a02cb3c25ae"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8c3e4b15d8cf85eb2ecb6a02cb3c25ae"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_CH34_REG</b>&#160;&#160;&#160;0x080</td></tr>
<tr class="separator:ga8c3e4b15d8cf85eb2ecb6a02cb3c25ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga145842795771ce41872fd82b1a2794fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga145842795771ce41872fd82b1a2794fb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_EXT_REG</b>&#160;&#160;&#160;0x084</td></tr>
<tr class="separator:ga145842795771ce41872fd82b1a2794fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga95b752fe183937a90736cc398e0a7b08"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga95b752fe183937a90736cc398e0a7b08"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_RATE_CH12_REG</b>&#160;&#160;&#160;0x08C</td></tr>
<tr class="separator:ga95b752fe183937a90736cc398e0a7b08"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacfe7e880d9e1ebb1ab42cb9127550649"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacfe7e880d9e1ebb1ab42cb9127550649"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_RATE_CH34_REG</b>&#160;&#160;&#160;0x090</td></tr>
<tr class="separator:gacfe7e880d9e1ebb1ab42cb9127550649"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
HDMIPHY core registers: Receiver function registers.</h2></td></tr>
<tr class="memitem:gac9ff872959b7000db70e669ccdf2009f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac9ff872959b7000db70e669ccdf2009f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_RATE_CH12_REG</b>&#160;&#160;&#160;0x98</td></tr>
<tr class="separator:gac9ff872959b7000db70e669ccdf2009f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaafb49d80008e67436fc7db477082fc76"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaafb49d80008e67436fc7db477082fc76"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_RATE_CH34_REG</b>&#160;&#160;&#160;0x9C</td></tr>
<tr class="separator:gaafb49d80008e67436fc7db477082fc76"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga49a165c996e4af1e8edb2fb02ef3f04c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga49a165c996e4af1e8edb2fb02ef3f04c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_REG</b>&#160;&#160;&#160;0x100</td></tr>
<tr class="separator:ga49a165c996e4af1e8edb2fb02ef3f04c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5d1ad2d74bd244fdd0280aff1f5de437"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5d1ad2d74bd244fdd0280aff1f5de437"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_REG</b>&#160;&#160;&#160;0x104</td></tr>
<tr class="separator:ga5d1ad2d74bd244fdd0280aff1f5de437"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6d21a6f0f06184d21cc0c5af81f03474"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6d21a6f0f06184d21cc0c5af81f03474"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_EQ_CDR_REG</b>&#160;&#160;&#160;0x108</td></tr>
<tr class="separator:ga6d21a6f0f06184d21cc0c5af81f03474"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa7edcca91c34b2762d0c94e302fe0ec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaa7edcca91c34b2762d0c94e302fe0ec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_TDLOCK_REG</b>&#160;&#160;&#160;0x10C</td></tr>
<tr class="separator:gaaa7edcca91c34b2762d0c94e302fe0ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
HDMIPHY core registers: Interrupt registers.</h2></td></tr>
<tr class="memitem:gae4aa20631a8c69d8b3ecb80c4c0d4795"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae4aa20631a8c69d8b3ecb80c4c0d4795"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_EN_REG</b>&#160;&#160;&#160;0x110</td></tr>
<tr class="separator:gae4aa20631a8c69d8b3ecb80c4c0d4795"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa8c3ab73bcd2e2531ecbb5288f086bce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa8c3ab73bcd2e2531ecbb5288f086bce"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_DIS_REG</b>&#160;&#160;&#160;0x114</td></tr>
<tr class="separator:gaa8c3ab73bcd2e2531ecbb5288f086bce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf2190f9bf7a354fd704764c1e51e5f5f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf2190f9bf7a354fd704764c1e51e5f5f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_MASK_REG</b>&#160;&#160;&#160;0x118</td></tr>
<tr class="separator:gaf2190f9bf7a354fd704764c1e51e5f5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeb72bd1b601d75e927cf5d15740fb142"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeb72bd1b601d75e927cf5d15740fb142"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_STS_REG</b>&#160;&#160;&#160;0x11C</td></tr>
<tr class="separator:gaeb72bd1b601d75e927cf5d15740fb142"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
User clocking registers: MMCM and BUFGGT registers.</h2></td></tr>
<tr class="memitem:ga8cccc2f102905c26d8e36d7cf2707c50"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8cccc2f102905c26d8e36d7cf2707c50"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_TXUSRCLK_CTRL_REG</b>&#160;&#160;&#160;0x0120</td></tr>
<tr class="separator:ga8cccc2f102905c26d8e36d7cf2707c50"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga65c46bcd0e312c3f591af44ffdad0f06"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga65c46bcd0e312c3f591af44ffdad0f06"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_TXUSRCLK_REG1</b>&#160;&#160;&#160;0x0124</td></tr>
<tr class="separator:ga65c46bcd0e312c3f591af44ffdad0f06"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7a6dffb4672b8cc3bdc4ce32e5f832a3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7a6dffb4672b8cc3bdc4ce32e5f832a3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_TXUSRCLK_REG2</b>&#160;&#160;&#160;0x0128</td></tr>
<tr class="separator:ga7a6dffb4672b8cc3bdc4ce32e5f832a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0d941ca925be3c2f3fac9943f026bb2b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0d941ca925be3c2f3fac9943f026bb2b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_TXUSRCLK_REG3</b>&#160;&#160;&#160;0x012C</td></tr>
<tr class="separator:ga0d941ca925be3c2f3fac9943f026bb2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga34f25e6a2580e6c92e602e9f786c9385"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga34f25e6a2580e6c92e602e9f786c9385"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_TXUSRCLK_REG4</b>&#160;&#160;&#160;0x0130</td></tr>
<tr class="separator:ga34f25e6a2580e6c92e602e9f786c9385"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga33716dbf5e2ef2d91117032abbc90881"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga33716dbf5e2ef2d91117032abbc90881"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BUFGGT_TXUSRCLK_REG</b>&#160;&#160;&#160;0x0134</td></tr>
<tr class="separator:ga33716dbf5e2ef2d91117032abbc90881"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga59cd7bf78218bacca6e83431dd559c49"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga59cd7bf78218bacca6e83431dd559c49"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MISC_TXUSRCLK_REG</b>&#160;&#160;&#160;0x0138</td></tr>
<tr class="separator:ga59cd7bf78218bacca6e83431dd559c49"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab5b2fb048a569ab6fd86c2ed7ab902f7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab5b2fb048a569ab6fd86c2ed7ab902f7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_RXUSRCLK_CTRL_REG</b>&#160;&#160;&#160;0x0140</td></tr>
<tr class="separator:gab5b2fb048a569ab6fd86c2ed7ab902f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1cf1e570df99724c42d342a5d14ed51a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1cf1e570df99724c42d342a5d14ed51a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_RXUSRCLK_REG1</b>&#160;&#160;&#160;0x0144</td></tr>
<tr class="separator:ga1cf1e570df99724c42d342a5d14ed51a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac6c1d544e9ac2885c338a096b07a3f1a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac6c1d544e9ac2885c338a096b07a3f1a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_RXUSRCLK_REG2</b>&#160;&#160;&#160;0x0148</td></tr>
<tr class="separator:gac6c1d544e9ac2885c338a096b07a3f1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaabd6bf37aa32474f4a4517cd18bb5053"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaabd6bf37aa32474f4a4517cd18bb5053"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_RXUSRCLK_REG3</b>&#160;&#160;&#160;0x014C</td></tr>
<tr class="separator:gaabd6bf37aa32474f4a4517cd18bb5053"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5ce98dd292e09084c773853348f13147"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5ce98dd292e09084c773853348f13147"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_RXUSRCLK_REG4</b>&#160;&#160;&#160;0x0150</td></tr>
<tr class="separator:ga5ce98dd292e09084c773853348f13147"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0702e181d6f4ce285e691d4435fe7af1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0702e181d6f4ce285e691d4435fe7af1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BUFGGT_RXUSRCLK_REG</b>&#160;&#160;&#160;0x0154</td></tr>
<tr class="separator:ga0702e181d6f4ce285e691d4435fe7af1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga68c6da04dc8401ee0e1325d211964192"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga68c6da04dc8401ee0e1325d211964192"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MISC_RXUSRCLK_REG</b>&#160;&#160;&#160;0x0158</td></tr>
<tr class="separator:ga68c6da04dc8401ee0e1325d211964192"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Clock detector (HDMI) registers.</h2></td></tr>
<tr class="memitem:ga0d72d4d9fc755d4dcd5df403ea0a0806"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0d72d4d9fc755d4dcd5df403ea0a0806"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_REG</b>&#160;&#160;&#160;0x0200</td></tr>
<tr class="separator:ga0d72d4d9fc755d4dcd5df403ea0a0806"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0028bfef0c23d3f437c2da9ddb0089f7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0028bfef0c23d3f437c2da9ddb0089f7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_STAT_REG</b>&#160;&#160;&#160;0x0204</td></tr>
<tr class="separator:ga0028bfef0c23d3f437c2da9ddb0089f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5f12eb09e7c2dddd3430b30650821379"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5f12eb09e7c2dddd3430b30650821379"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_TMR_TO_REG</b>&#160;&#160;&#160;0x0208</td></tr>
<tr class="separator:ga5f12eb09e7c2dddd3430b30650821379"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf8b886ceefdd973e7c707c7132314327"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf8b886ceefdd973e7c707c7132314327"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_TX_REG</b>&#160;&#160;&#160;0x020C</td></tr>
<tr class="separator:gaf8b886ceefdd973e7c707c7132314327"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab1df70ec80e2f432df609f814ac3c046"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab1df70ec80e2f432df609f814ac3c046"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_RX_REG</b>&#160;&#160;&#160;0x0210</td></tr>
<tr class="separator:gab1df70ec80e2f432df609f814ac3c046"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8a1f632f575bbe36c94e280676c2024d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8a1f632f575bbe36c94e280676c2024d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_TMR_TX_REG</b>&#160;&#160;&#160;0x0214</td></tr>
<tr class="separator:ga8a1f632f575bbe36c94e280676c2024d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga684640fa42d4d5e137883cb91bb567a7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga684640fa42d4d5e137883cb91bb567a7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_TMR_RX_REG</b>&#160;&#160;&#160;0x0218</td></tr>
<tr class="separator:ga684640fa42d4d5e137883cb91bb567a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga695bdc00a7c38302149b30d9accea84e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga695bdc00a7c38302149b30d9accea84e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_DRU_REG</b>&#160;&#160;&#160;0x021C</td></tr>
<tr class="separator:ga695bdc00a7c38302149b30d9accea84e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab3436740b223f2968397483c843eca60"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab3436740b223f2968397483c843eca60"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_TX_FRL_REG</b>&#160;&#160;&#160;0x0230</td></tr>
<tr class="separator:gab3436740b223f2968397483c843eca60"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga21f000d368199ba4ab87876d0aaabe96"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga21f000d368199ba4ab87876d0aaabe96"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_FREQ_RX_FRL_REG</b>&#160;&#160;&#160;0x0234</td></tr>
<tr class="separator:ga21f000d368199ba4ab87876d0aaabe96"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Data recovery unit registers (HDMI).</h2></td></tr>
<tr class="memitem:gae5672003ffb4bf9dc8480ca586b60c51"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae5672003ffb4bf9dc8480ca586b60c51"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CTRL_REG</b>&#160;&#160;&#160;0x0300</td></tr>
<tr class="separator:gae5672003ffb4bf9dc8480ca586b60c51"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga01f10f1954b15bc4801769675627b565"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga01f10f1954b15bc4801769675627b565"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_STAT_REG</b>&#160;&#160;&#160;0x0304</td></tr>
<tr class="separator:ga01f10f1954b15bc4801769675627b565"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6e9e6c25a31a9f772d21af064bd90baa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6e9e6c25a31a9f772d21af064bd90baa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CFREQ_L_REG</b>(Ch)&#160;&#160;&#160;(0x0308 + (12 * (Ch - 1)))</td></tr>
<tr class="separator:ga6e9e6c25a31a9f772d21af064bd90baa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga46d3e80a3819d0823a4c79bbf3a17512"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga46d3e80a3819d0823a4c79bbf3a17512"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CFREQ_H_REG</b>(Ch)&#160;&#160;&#160;(0x030C + (12 * (Ch - 1)))</td></tr>
<tr class="separator:ga46d3e80a3819d0823a4c79bbf3a17512"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1741c886e49505cd3247c680ca7be55a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1741c886e49505cd3247c680ca7be55a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_REG</b>(Ch)&#160;&#160;&#160;(0x0310 + (12 * (Ch - 1)))</td></tr>
<tr class="separator:ga1741c886e49505cd3247c680ca7be55a"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
TMDS Clock Pattern Generator registers (HDMI).</h2></td></tr>
<tr class="memitem:gad0bf22209591a3a951f497c2b1890d5a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad0bf22209591a3a951f497c2b1890d5a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PATGEN_CTRL_REG</b>&#160;&#160;&#160;0x0340</td></tr>
<tr class="separator:gad0bf22209591a3a951f497c2b1890d5a"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
HDMIPHY core masks, shifts, and register values.</h2></td></tr>
<tr class="memitem:gab54d4cffc70ebfc28574d58d7965b3c2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gab54d4cffc70ebfc28574d58d7965b3c2">XHDMIPHY1_VERSION_INTER_REV_MASK</a>&#160;&#160;&#160;0x000000FF</td></tr>
<tr class="memdesc:gab54d4cffc70ebfc28574d58d7965b3c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Internal revision.  <a href="#gab54d4cffc70ebfc28574d58d7965b3c2">More...</a><br/></td></tr>
<tr class="separator:gab54d4cffc70ebfc28574d58d7965b3c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf9e55165fdb1fdf467dba14ad5755240"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaf9e55165fdb1fdf467dba14ad5755240">XHDMIPHY1_VERSION_CORE_PATCH_MASK</a>&#160;&#160;&#160;0x00000F00</td></tr>
<tr class="memdesc:gaf9e55165fdb1fdf467dba14ad5755240"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core patch details.  <a href="#gaf9e55165fdb1fdf467dba14ad5755240">More...</a><br/></td></tr>
<tr class="separator:gaf9e55165fdb1fdf467dba14ad5755240"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab31e816466d00835f4835fecd3513cd0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gab31e816466d00835f4835fecd3513cd0">XHDMIPHY1_VERSION_CORE_PATCH_SHIFT</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:gab31e816466d00835f4835fecd3513cd0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for core patch details.  <a href="#gab31e816466d00835f4835fecd3513cd0">More...</a><br/></td></tr>
<tr class="separator:gab31e816466d00835f4835fecd3513cd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3a16eb39f8a6cb000e6d5fcddbf04b6c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga3a16eb39f8a6cb000e6d5fcddbf04b6c">XHDMIPHY1_VERSION_CORE_VER_REV_MASK</a>&#160;&#160;&#160;0x0000F000</td></tr>
<tr class="memdesc:ga3a16eb39f8a6cb000e6d5fcddbf04b6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core version revision.  <a href="#ga3a16eb39f8a6cb000e6d5fcddbf04b6c">More...</a><br/></td></tr>
<tr class="separator:ga3a16eb39f8a6cb000e6d5fcddbf04b6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaefd13bfaf8d5cdf97e44d5479fc26c73"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaefd13bfaf8d5cdf97e44d5479fc26c73">XHDMIPHY1_VERSION_CORE_VER_REV_SHIFT</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:gaefd13bfaf8d5cdf97e44d5479fc26c73"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for core version revision.  <a href="#gaefd13bfaf8d5cdf97e44d5479fc26c73">More...</a><br/></td></tr>
<tr class="separator:gaefd13bfaf8d5cdf97e44d5479fc26c73"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7ef7479579d49362a655572d14196e12"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga7ef7479579d49362a655572d14196e12">XHDMIPHY1_VERSION_CORE_VER_MNR_MASK</a>&#160;&#160;&#160;0x00FF0000</td></tr>
<tr class="memdesc:ga7ef7479579d49362a655572d14196e12"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core minor version.  <a href="#ga7ef7479579d49362a655572d14196e12">More...</a><br/></td></tr>
<tr class="separator:ga7ef7479579d49362a655572d14196e12"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga045bdbe9f1a6f88f1d320a4b462308de"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga045bdbe9f1a6f88f1d320a4b462308de">XHDMIPHY1_VERSION_CORE_VER_MNR_SHIFT</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:ga045bdbe9f1a6f88f1d320a4b462308de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for core minor version.  <a href="#ga045bdbe9f1a6f88f1d320a4b462308de">More...</a><br/></td></tr>
<tr class="separator:ga045bdbe9f1a6f88f1d320a4b462308de"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf133797705643b5175c49aa1351a64f9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#gaf133797705643b5175c49aa1351a64f9">XHDMIPHY1_VERSION_CORE_VER_MJR_MASK</a>&#160;&#160;&#160;0xFF000000</td></tr>
<tr class="memdesc:gaf133797705643b5175c49aa1351a64f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core major version.  <a href="#gaf133797705643b5175c49aa1351a64f9">More...</a><br/></td></tr>
<tr class="separator:gaf133797705643b5175c49aa1351a64f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3739592ccb4d12897a34189b354f0fca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xhdmiphy1.html#ga3739592ccb4d12897a34189b354f0fca">XHDMIPHY1_VERSION_CORE_VER_MJR_SHIFT</a>&#160;&#160;&#160;24</td></tr>
<tr class="memdesc:ga3739592ccb4d12897a34189b354f0fca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for core major version.  <a href="#ga3739592ccb4d12897a34189b354f0fca">More...</a><br/></td></tr>
<tr class="separator:ga3739592ccb4d12897a34189b354f0fca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa9602273316e4b4f4eab5a059531610"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaa9602273316e4b4f4eab5a059531610"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BANK_SELECT_TX_MASK</b>&#160;&#160;&#160;0x00F</td></tr>
<tr class="separator:gaaa9602273316e4b4f4eab5a059531610"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga169a363a3c894069f1809c43ff42c43a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga169a363a3c894069f1809c43ff42c43a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BANK_SELECT_RX_MASK</b>&#160;&#160;&#160;0xF00</td></tr>
<tr class="separator:ga169a363a3c894069f1809c43ff42c43a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9eac0cc4ba2ab8c6ff45d6dd26aeec5d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9eac0cc4ba2ab8c6ff45d6dd26aeec5d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BANK_SELECT_RX_SHIFT</b>&#160;&#160;&#160;8</td></tr>
<tr class="separator:ga9eac0cc4ba2ab8c6ff45d6dd26aeec5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga45467c6b2717098e1ace98cd69093843"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga45467c6b2717098e1ace98cd69093843"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_QPLL0_MASK</b>&#160;&#160;&#160;0x0000000F</td></tr>
<tr class="separator:ga45467c6b2717098e1ace98cd69093843"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad261eb4f7c821b5355a6422bd886e047"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad261eb4f7c821b5355a6422bd886e047"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_CPLL_MASK</b>&#160;&#160;&#160;0x000000F0</td></tr>
<tr class="separator:gad261eb4f7c821b5355a6422bd886e047"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2a5065dc359342507e917b4f2aad2831"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a5065dc359342507e917b4f2aad2831"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_CPLL_SHIFT</b>&#160;&#160;&#160;4</td></tr>
<tr class="separator:ga2a5065dc359342507e917b4f2aad2831"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2b1183b4e295a3b3fc42d90448ab256a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2b1183b4e295a3b3fc42d90448ab256a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_QPLL1_MASK</b>&#160;&#160;&#160;0x00000F00</td></tr>
<tr class="separator:ga2b1183b4e295a3b3fc42d90448ab256a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae3ff730e1cce48847fccf1f5065dabf1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae3ff730e1cce48847fccf1f5065dabf1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_QPLL1_SHIFT</b>&#160;&#160;&#160;8</td></tr>
<tr class="separator:gae3ff730e1cce48847fccf1f5065dabf1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabec5c1e39a0b9b980c39968919617785"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabec5c1e39a0b9b980c39968919617785"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTREFCLK0</b>&#160;&#160;&#160;1</td></tr>
<tr class="separator:gabec5c1e39a0b9b980c39968919617785"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3c759deda306b9b431e6d10712579d38"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3c759deda306b9b431e6d10712579d38"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTREFCLK1</b>&#160;&#160;&#160;2</td></tr>
<tr class="separator:ga3c759deda306b9b431e6d10712579d38"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf784bd00b620fbd870a8fb2b1036592f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf784bd00b620fbd870a8fb2b1036592f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTNORTHREFCLK0</b>&#160;&#160;&#160;3</td></tr>
<tr class="separator:gaf784bd00b620fbd870a8fb2b1036592f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd24b80f95ddf6f8ddce193ab52a80c3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafd24b80f95ddf6f8ddce193ab52a80c3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTNORTHREFCLK1</b>&#160;&#160;&#160;4</td></tr>
<tr class="separator:gafd24b80f95ddf6f8ddce193ab52a80c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac23988f503767b0bf04a7297a15dc60f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac23988f503767b0bf04a7297a15dc60f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTSOUTHREFCLK0</b>&#160;&#160;&#160;5</td></tr>
<tr class="separator:gac23988f503767b0bf04a7297a15dc60f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga160410d910b99556cfb50f437e672c25"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga160410d910b99556cfb50f437e672c25"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTSOUTHREFCLK1</b>&#160;&#160;&#160;6</td></tr>
<tr class="separator:ga160410d910b99556cfb50f437e672c25"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4dfc5f909b955eae9b18a23bca995b0f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4dfc5f909b955eae9b18a23bca995b0f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTEASTREFCLK0</b>&#160;&#160;&#160;3</td></tr>
<tr class="separator:ga4dfc5f909b955eae9b18a23bca995b0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9f5a44b0fc56f44a50190051c2274c7b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9f5a44b0fc56f44a50190051c2274c7b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTEASTREFCLK1</b>&#160;&#160;&#160;4</td></tr>
<tr class="separator:ga9f5a44b0fc56f44a50190051c2274c7b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga34f51cf6c7775f0dc93f1d8861827880"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga34f51cf6c7775f0dc93f1d8861827880"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTWESTREFCLK0</b>&#160;&#160;&#160;5</td></tr>
<tr class="separator:ga34f51cf6c7775f0dc93f1d8861827880"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaab06cbb0552823a42da069d7567d8718"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaab06cbb0552823a42da069d7567d8718"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTWESTREFCLK1</b>&#160;&#160;&#160;6</td></tr>
<tr class="separator:gaab06cbb0552823a42da069d7567d8718"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2b4f9adaeb006b3d039f75bb664ae58f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2b4f9adaeb006b3d039f75bb664ae58f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XPLL_GTGREFCLK</b>&#160;&#160;&#160;7</td></tr>
<tr class="separator:ga2b4f9adaeb006b3d039f75bb664ae58f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaff3d957c80e03bb4b6cbe586dded467d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaff3d957c80e03bb4b6cbe586dded467d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_SYSCLKSEL_MASK</b>&#160;&#160;&#160;0x0F000000</td></tr>
<tr class="separator:gaff3d957c80e03bb4b6cbe586dded467d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0709f51c5f40f26b0be87bb0a75bce16"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0709f51c5f40f26b0be87bb0a75bce16"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_SYSCLKSEL_SHIFT</b>&#160;&#160;&#160;24</td></tr>
<tr class="separator:ga0709f51c5f40f26b0be87bb0a75bce16"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4fc1a4865a5505e89dff0c72061b8e8b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4fc1a4865a5505e89dff0c72061b8e8b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_PLL0</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:ga4fc1a4865a5505e89dff0c72061b8e8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga477aa64102dbb6b52eb558cd03ce3f22"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga477aa64102dbb6b52eb558cd03ce3f22"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_PLL1</b>&#160;&#160;&#160;1</td></tr>
<tr class="separator:ga477aa64102dbb6b52eb558cd03ce3f22"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaec40f9e7ac36ea10ff801bc9e8b73995"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaec40f9e7ac36ea10ff801bc9e8b73995"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_CPLL</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:gaec40f9e7ac36ea10ff801bc9e8b73995"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafca1d4550ad35dbf0ee564e9334334f3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafca1d4550ad35dbf0ee564e9334334f3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_QPLL</b>&#160;&#160;&#160;1</td></tr>
<tr class="separator:gafca1d4550ad35dbf0ee564e9334334f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga632b294c3a4a91bc74aaa930fb5550a3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga632b294c3a4a91bc74aaa930fb5550a3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_QPLL0</b>&#160;&#160;&#160;3</td></tr>
<tr class="separator:ga632b294c3a4a91bc74aaa930fb5550a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadc7d2d0d55264bde7ab16f5a79aa9276"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadc7d2d0d55264bde7ab16f5a79aa9276"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_DATA_QPLL1</b>&#160;&#160;&#160;2</td></tr>
<tr class="separator:gadc7d2d0d55264bde7ab16f5a79aa9276"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga68250145f626bef83db01c08fd0943ca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga68250145f626bef83db01c08fd0943ca"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_OUT_CH</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:ga68250145f626bef83db01c08fd0943ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d1c81e0801cad298772d255985f09b6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8d1c81e0801cad298772d255985f09b6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_OUT_CMN</b>&#160;&#160;&#160;1</td></tr>
<tr class="separator:ga8d1c81e0801cad298772d255985f09b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf2027c9dbc13308b41be43c71919b58f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf2027c9dbc13308b41be43c71919b58f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_OUT_CMN0</b>&#160;&#160;&#160;2</td></tr>
<tr class="separator:gaf2027c9dbc13308b41be43c71919b58f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab58386dd75a31e440ce15b8e8d3f5751"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab58386dd75a31e440ce15b8e8d3f5751"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_XXSYSCLKSEL_OUT_CMN1</b>&#160;&#160;&#160;3</td></tr>
<tr class="separator:gab58386dd75a31e440ce15b8e8d3f5751"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae4af42d0828d296522173f8da875d41a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae4af42d0828d296522173f8da875d41a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_RXSYSCLKSEL_OUT_MASK</b>(G)</td></tr>
<tr class="separator:gae4af42d0828d296522173f8da875d41a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeb1bf22f59fb34927471fc3277012020"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeb1bf22f59fb34927471fc3277012020"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_TXSYSCLKSEL_OUT_MASK</b>(G)</td></tr>
<tr class="separator:gaeb1bf22f59fb34927471fc3277012020"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3c4142bcd6d9c051a7d53b9309378073"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3c4142bcd6d9c051a7d53b9309378073"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_RXSYSCLKSEL_DATA_MASK</b>(G)</td></tr>
<tr class="separator:ga3c4142bcd6d9c051a7d53b9309378073"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac2cb32230167e1415e3d5e6f80808e4e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac2cb32230167e1415e3d5e6f80808e4e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_TXSYSCLKSEL_DATA_MASK</b>(G)</td></tr>
<tr class="separator:gac2cb32230167e1415e3d5e6f80808e4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2f4307185c664bcbdf5e9f0e36b172c1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2f4307185c664bcbdf5e9f0e36b172c1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_RXSYSCLKSEL_OUT_SHIFT</b>(G)</td></tr>
<tr class="separator:ga2f4307185c664bcbdf5e9f0e36b172c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1f8bc69ac5672222cba5fc91f96890ed"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1f8bc69ac5672222cba5fc91f96890ed"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_TXSYSCLKSEL_OUT_SHIFT</b>(G)</td></tr>
<tr class="separator:ga1f8bc69ac5672222cba5fc91f96890ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga590362135f00d0d8a48baf5aad8940d1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga590362135f00d0d8a48baf5aad8940d1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_RXSYSCLKSEL_DATA_SHIFT</b>(G)</td></tr>
<tr class="separator:ga590362135f00d0d8a48baf5aad8940d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga582cc74e64a044af03bdcea375feccdb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga582cc74e64a044af03bdcea375feccdb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_REF_CLK_SEL_TXSYSCLKSEL_DATA_SHIFT</b>(G)</td></tr>
<tr class="separator:ga582cc74e64a044af03bdcea375feccdb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga646057fa7bef920c350c3bc7443dd9e3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga646057fa7bef920c350c3bc7443dd9e3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_RESET_CPLL_MASK</b>&#160;&#160;&#160;0x1</td></tr>
<tr class="separator:ga646057fa7bef920c350c3bc7443dd9e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3bbe06ff2c4b76232850dba3f61ac4ae"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3bbe06ff2c4b76232850dba3f61ac4ae"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_RESET_QPLL0_MASK</b>&#160;&#160;&#160;0x2</td></tr>
<tr class="separator:ga3bbe06ff2c4b76232850dba3f61ac4ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac23e431ec3220000ec9d2e91d57aa2a4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac23e431ec3220000ec9d2e91d57aa2a4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_RESET_QPLL1_MASK</b>&#160;&#160;&#160;0x4</td></tr>
<tr class="separator:gac23e431ec3220000ec9d2e91d57aa2a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2bc624c27a31a797930f81db49dd881a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2bc624c27a31a797930f81db49dd881a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_GTWIZ_RESET_ALL_MASK</b>&#160;&#160;&#160;0x1</td></tr>
<tr class="separator:ga2bc624c27a31a797930f81db49dd881a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d8c14bb9ca59bd423469895c882ddb3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9d8c14bb9ca59bd423469895c882ddb3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PCIERST_ALL_CH_MASK</b>&#160;&#160;&#160;0x2</td></tr>
<tr class="separator:ga9d8c14bb9ca59bd423469895c882ddb3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8fa28991405bfb7b8fb09aca2a9f4f04"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8fa28991405bfb7b8fb09aca2a9f4f04"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_CPLL_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (Ch - 1))</td></tr>
<tr class="separator:ga8fa28991405bfb7b8fb09aca2a9f4f04"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga443a6a1c501e9b8cad18e97c0b40b747"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga443a6a1c501e9b8cad18e97c0b40b747"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_QPLL0_MASK</b>&#160;&#160;&#160;0x10</td></tr>
<tr class="separator:ga443a6a1c501e9b8cad18e97c0b40b747"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga761896b0e00538fcc7fb20b89b4421c9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga761896b0e00538fcc7fb20b89b4421c9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_QPLL1_MASK</b>&#160;&#160;&#160;0x20</td></tr>
<tr class="separator:ga761896b0e00538fcc7fb20b89b4421c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2f4ca8329a497eb7d78cbb366384a669"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2f4ca8329a497eb7d78cbb366384a669"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_CPLL_ALL_MASK</b></td></tr>
<tr class="separator:ga2f4ca8329a497eb7d78cbb366384a669"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6a6bdbd1870b9072a446c7d01cf5b78b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6a6bdbd1870b9072a446c7d01cf5b78b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_CPLL_HDMI_MASK</b></td></tr>
<tr class="separator:ga6a6bdbd1870b9072a446c7d01cf5b78b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae23736bdd8fc67ee3004cab94bb6b39b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae23736bdd8fc67ee3004cab94bb6b39b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_RPLL_MASK</b>&#160;&#160;&#160;0xC0</td></tr>
<tr class="separator:gae23736bdd8fc67ee3004cab94bb6b39b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga764057238ed1990a3d5b1f0523b774a5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga764057238ed1990a3d5b1f0523b774a5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PLL_LOCK_STATUS_LCPLL_MASK</b>&#160;&#160;&#160;0x300</td></tr>
<tr class="separator:ga764057238ed1990a3d5b1f0523b774a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga65ad0d98545b38c88d713833b0e57823"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga65ad0d98545b38c88d713833b0e57823"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_GTRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga65ad0d98545b38c88d713833b0e57823"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaf7647df097ca5bbd723667a5ca1bac0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaf7647df097ca5bbd723667a5ca1bac0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_PMARESET_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gaaf7647df097ca5bbd723667a5ca1bac0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab4af06276a3788cea3544a85f12e7a46"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab4af06276a3788cea3544a85f12e7a46"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_PCSRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gab4af06276a3788cea3544a85f12e7a46"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga765131147d3e211282cf8f2cf305754f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga765131147d3e211282cf8f2cf305754f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_INIT_USERRDY_MASK</b>(Ch)&#160;&#160;&#160;(0x08 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga765131147d3e211282cf8f2cf305754f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf65abc623a1eab0d8d8d08085bcaa355"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf65abc623a1eab0d8d8d08085bcaa355"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_LNKRDY_SB_MASK</b>(Ch)&#160;&#160;&#160;(0x10 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gaf65abc623a1eab0d8d8d08085bcaa355"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacd544f562fa8ceca6a21a15ad12ece3b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacd544f562fa8ceca6a21a15ad12ece3b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_MSTRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x20 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gacd544f562fa8ceca6a21a15ad12ece3b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8beeae3e1cd33460db0fa5f9bec14d8f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8beeae3e1cd33460db0fa5f9bec14d8f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_INIT_USERRDY_MASK</b>(Ch)&#160;&#160;&#160;(0x40 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga8beeae3e1cd33460db0fa5f9bec14d8f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga97e0c83e8eb27829880672716883e6e9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga97e0c83e8eb27829880672716883e6e9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_PLLGTRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x80 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga97e0c83e8eb27829880672716883e6e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaed0c95b5b5ddc1f755cfb72995b2bb75"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaed0c95b5b5ddc1f755cfb72995b2bb75"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_GTRESET_ALL_MASK</b></td></tr>
<tr class="separator:gaed0c95b5b5ddc1f755cfb72995b2bb75"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8492db7896a1a8b02692b1f9e473f221"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8492db7896a1a8b02692b1f9e473f221"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_LNKRDY_SB_ALL_MASK</b></td></tr>
<tr class="separator:ga8492db7896a1a8b02692b1f9e473f221"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaff062dc1a9798a164eaeafab6765a523"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaff062dc1a9798a164eaeafab6765a523"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_MSTRESET_ALL_MASK</b></td></tr>
<tr class="separator:gaff062dc1a9798a164eaeafab6765a523"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac7525834f8d093a43e25d5a2812ad6e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac7525834f8d093a43e25d5a2812ad6e0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_INIT_USERRDY_ALL_MASK</b></td></tr>
<tr class="separator:gac7525834f8d093a43e25d5a2812ad6e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad753800cd743e755e9c2bdf08cad3ee0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad753800cd743e755e9c2bdf08cad3ee0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_INIT_USERRDY_ALL_MASK</b></td></tr>
<tr class="separator:gad753800cd743e755e9c2bdf08cad3ee0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae7b90ceb87c6ca5c6d1e7b1db67fcedf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae7b90ceb87c6ca5c6d1e7b1db67fcedf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_PLLGTRESET_ALL_MASK</b></td></tr>
<tr class="separator:gae7b90ceb87c6ca5c6d1e7b1db67fcedf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga541e86f2c238c7d8fe8653b2c53b532f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga541e86f2c238c7d8fe8653b2c53b532f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_STATUS_RESETDONE_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga541e86f2c238c7d8fe8653b2c53b532f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf6e8aa459475a779bd19f7cf4025bc56"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf6e8aa459475a779bd19f7cf4025bc56"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_STATUS_PMARESETDONE_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gaf6e8aa459475a779bd19f7cf4025bc56"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga52d1b49cd2a873340de010af2d32f650"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga52d1b49cd2a873340de010af2d32f650"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_STATUS_POWERGOOD_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga52d1b49cd2a873340de010af2d32f650"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9e19d3196f2f542baef5e0527135e215"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9e19d3196f2f542baef5e0527135e215"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_STATUS_RESETDONE_ALL_MASK</b></td></tr>
<tr class="separator:ga9e19d3196f2f542baef5e0527135e215"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad13ba250e5be855db3904f3261a49c23"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad13ba250e5be855db3904f3261a49c23"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TXRX_INIT_STATUS_PMARESETDONE_ALL_MASK</b></td></tr>
<tr class="separator:gad13ba250e5be855db3904f3261a49c23"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac8825b701df0e05b9f5c98f5783daeb7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac8825b701df0e05b9f5c98f5783daeb7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_IBUFDS_GTXX_CTRL_GTREFCLK0_CEB_MASK</b>&#160;&#160;&#160;0x1</td></tr>
<tr class="separator:gac8825b701df0e05b9f5c98f5783daeb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga767401923ba72379f3a875c04eaeabda"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga767401923ba72379f3a875c04eaeabda"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_IBUFDS_GTXX_CTRL_GTREFCLK1_CEB_MASK</b>&#160;&#160;&#160;0x2</td></tr>
<tr class="separator:ga767401923ba72379f3a875c04eaeabda"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0974732721eb7ecc3371ef3e6f3010f5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0974732721eb7ecc3371ef3e6f3010f5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_CPLLPD_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga0974732721eb7ecc3371ef3e6f3010f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga85a466e73d1706390d3dae147a38de5c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga85a466e73d1706390d3dae147a38de5c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_QPLL0PD_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga85a466e73d1706390d3dae147a38de5c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga835389a33e296547b56cca7c927fe22c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga835389a33e296547b56cca7c927fe22c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_QPLL1PD_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga835389a33e296547b56cca7c927fe22c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9f51c07446a7769b8233c0583a0d901b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9f51c07446a7769b8233c0583a0d901b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_RXPD_MASK</b>(Ch)&#160;&#160;&#160;(0x18 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga9f51c07446a7769b8233c0583a0d901b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7910901f1219ca0486f197b8eb5440a3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7910901f1219ca0486f197b8eb5440a3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_RXPD_SHIFT</b>(Ch)&#160;&#160;&#160;(3 + (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga7910901f1219ca0486f197b8eb5440a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2443b85be51f198fcb554436b062d322"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2443b85be51f198fcb554436b062d322"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_TXPD_MASK</b>(Ch)&#160;&#160;&#160;(0x60 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga2443b85be51f198fcb554436b062d322"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad7d9f645d3c421f29bea811a9217cec5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad7d9f645d3c421f29bea811a9217cec5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_POWERDOWN_CONTROL_TXPD_SHIFT</b>(Ch)&#160;&#160;&#160;(5 + (8 * (Ch - 1)))</td></tr>
<tr class="separator:gad7d9f645d3c421f29bea811a9217cec5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga82c9d2d66cf2a82a7bd61b40e450234a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga82c9d2d66cf2a82a7bd61b40e450234a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_LOOPBACK_CONTROL_CH_MASK</b>(Ch)&#160;&#160;&#160;(0x03 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga82c9d2d66cf2a82a7bd61b40e450234a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7d902a4d7f99a59555fa7f86b6a94c98"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7d902a4d7f99a59555fa7f86b6a94c98"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_LOOPBACK_CONTROL_CH_SHIFT</b>(Ch)&#160;&#160;&#160;(8 * (Ch - 1))</td></tr>
<tr class="separator:ga7d902a4d7f99a59555fa7f86b6a94c98"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7f16a737f720cc1e76c44fda133de037"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7f16a737f720cc1e76c44fda133de037"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPADDR_MASK</b>&#160;&#160;&#160;0x00000FFF</td></tr>
<tr class="separator:ga7f16a737f720cc1e76c44fda133de037"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac90c477385a7ba0e787015afc4336df2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac90c477385a7ba0e787015afc4336df2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPEN_MASK</b>&#160;&#160;&#160;0x00001000</td></tr>
<tr class="separator:gac90c477385a7ba0e787015afc4336df2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5cc9c67fa3ee8045abfd9e315147e95b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5cc9c67fa3ee8045abfd9e315147e95b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPWE_MASK</b>&#160;&#160;&#160;0x00002000</td></tr>
<tr class="separator:ga5cc9c67fa3ee8045abfd9e315147e95b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac55e494ae6653c61006dbdcb4459d3a6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac55e494ae6653c61006dbdcb4459d3a6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPRESET_MASK</b>&#160;&#160;&#160;0x00004000</td></tr>
<tr class="separator:gac55e494ae6653c61006dbdcb4459d3a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaec51840cf442666081e34c8f7920f3b4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaec51840cf442666081e34c8f7920f3b4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPDI_MASK</b>&#160;&#160;&#160;0xFFFF0000</td></tr>
<tr class="separator:gaec51840cf442666081e34c8f7920f3b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b67373afb06e3a391366f5de784eefd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3b67373afb06e3a391366f5de784eefd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_CONTROL_DRPDI_SHIFT</b>&#160;&#160;&#160;16</td></tr>
<tr class="separator:ga3b67373afb06e3a391366f5de784eefd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7c398f50dbfd9a6e418333c9b469b6e7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7c398f50dbfd9a6e418333c9b469b6e7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_DRPO_MASK</b>&#160;&#160;&#160;0x0FFFF</td></tr>
<tr class="separator:ga7c398f50dbfd9a6e418333c9b469b6e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6691b17837c3fb4d249605b71de257d6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6691b17837c3fb4d249605b71de257d6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_DRPRDY_MASK</b>&#160;&#160;&#160;0x10000</td></tr>
<tr class="separator:ga6691b17837c3fb4d249605b71de257d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27d684bf5a5a5cbb0f1826d8eff2edfd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga27d684bf5a5a5cbb0f1826d8eff2edfd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRP_STATUS_DRPBUSY_MASK</b>&#160;&#160;&#160;0x20000</td></tr>
<tr class="separator:ga27d684bf5a5a5cbb0f1826d8eff2edfd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga04e8afeac1d4a28506bf15bb0ef5c6e0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga04e8afeac1d4a28506bf15bb0ef5c6e0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CPLL_CAL_PERIOD_MASK</b>&#160;&#160;&#160;0x3FFFF</td></tr>
<tr class="separator:ga04e8afeac1d4a28506bf15bb0ef5c6e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga88c959432c433c7af4eb7719d30e20f3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga88c959432c433c7af4eb7719d30e20f3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CPLL_CAL_TOL_MASK</b>&#160;&#160;&#160;0x3FFFF</td></tr>
<tr class="separator:ga88c959432c433c7af4eb7719d30e20f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabd6bc6373a666e9b541deb1a3c1d182e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabd6bc6373a666e9b541deb1a3c1d182e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_GPI_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (Ch - 1))</td></tr>
<tr class="separator:gabd6bc6373a666e9b541deb1a3c1d182e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaac0c3d4fddae664298c2eb107ad7b3ba"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaac0c3d4fddae664298c2eb107ad7b3ba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_GPI_MASK</b>(Ch)&#160;&#160;&#160;(0x10 &lt;&lt; (Ch - 1))</td></tr>
<tr class="separator:gaac0c3d4fddae664298c2eb107ad7b3ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeb33773e66eb63339eff232a1436ed54"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaeb33773e66eb63339eff232a1436ed54"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_GPO_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (Ch - 1))</td></tr>
<tr class="separator:gaeb33773e66eb63339eff232a1436ed54"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad1cbd315cd4db9e383a5c70269f2171b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad1cbd315cd4db9e383a5c70269f2171b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_GPO_MASK_ALL</b>(NCh)&#160;&#160;&#160;((NCh == 3) ? 0x7 : 0xF)</td></tr>
<tr class="separator:gad1cbd315cd4db9e383a5c70269f2171b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac7356459c1462f9ba605b7238d3c7ac3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac7356459c1462f9ba605b7238d3c7ac3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_GPO_SHIFT</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:gac7356459c1462f9ba605b7238d3c7ac3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad3420cf986135dda53c3b04be818d13f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad3420cf986135dda53c3b04be818d13f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_GPO_MASK</b>(Ch)&#160;&#160;&#160;(0x10 &lt;&lt; (Ch - 1))</td></tr>
<tr class="separator:gad3420cf986135dda53c3b04be818d13f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga712573bd8630cb3c57155144269c8e82"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga712573bd8630cb3c57155144269c8e82"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_GPO_MASK_ALL</b>(NCh)&#160;&#160;&#160;((NCh == 3) ? 0x70 : 0xF0)</td></tr>
<tr class="separator:ga712573bd8630cb3c57155144269c8e82"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaef5f15cdebb410d21894387b77266864"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaef5f15cdebb410d21894387b77266864"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_GPO_SHIFT</b>&#160;&#160;&#160;4</td></tr>
<tr class="separator:gaef5f15cdebb410d21894387b77266864"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad306c0916fc23bd8a616b164618621e4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad306c0916fc23bd8a616b164618621e4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TX8B10BEN_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gad306c0916fc23bd8a616b164618621e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga41df956fe03fc9bdb0cec8b2209bd1ce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga41df956fe03fc9bdb0cec8b2209bd1ce"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TX8B10BEN_ALL_MASK</b></td></tr>
<tr class="separator:ga41df956fe03fc9bdb0cec8b2209bd1ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga85eacfa6f0d3b1d2bf39bdda12242dc5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga85eacfa6f0d3b1d2bf39bdda12242dc5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPOLARITY_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga85eacfa6f0d3b1d2bf39bdda12242dc5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6b27ba087e661f01a656ae331ff46838"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6b27ba087e661f01a656ae331ff46838"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPOLARITY_ALL_MASK</b></td></tr>
<tr class="separator:ga6b27ba087e661f01a656ae331ff46838"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacbeca5c70bbe5d4a53964d8228f5af59"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacbeca5c70bbe5d4a53964d8228f5af59"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPRBSSEL_MASK</b>(Ch)&#160;&#160;&#160;(0x5C &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gacbeca5c70bbe5d4a53964d8228f5af59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac16496cd97bcbf037b476a0a9fa9617a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac16496cd97bcbf037b476a0a9fa9617a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPRBSSEL_ALL_MASK</b></td></tr>
<tr class="separator:gac16496cd97bcbf037b476a0a9fa9617a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b6c77d7be23b8078940af42b4a5e333"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3b6c77d7be23b8078940af42b4a5e333"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPRBSSEL_SHIFT</b>(Ch)&#160;&#160;&#160;(2 + (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga3b6c77d7be23b8078940af42b4a5e333"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga362853eeabfb3af70089332c9ca557a3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga362853eeabfb3af70089332c9ca557a3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPRBSFORCEERR_MASK</b>(Ch)&#160;&#160;&#160;(0x20 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga362853eeabfb3af70089332c9ca557a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ab4289a507b75a1cb9f4df366191cd0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8ab4289a507b75a1cb9f4df366191cd0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_CONTROL_TXPRBSFORCEERR_ALL_MASK</b></td></tr>
<tr class="separator:ga8ab4289a507b75a1cb9f4df366191cd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3068702d02086a91662755df0c63193b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3068702d02086a91662755df0c63193b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXPHDLYRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga3068702d02086a91662755df0c63193b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaacf62af53a0ba13efefbe63c2cb44041"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaacf62af53a0ba13efefbe63c2cb44041"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXPHALIGN_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gaacf62af53a0ba13efefbe63c2cb44041"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga48dd3c6e27d9b5f9576e74036b027cd7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga48dd3c6e27d9b5f9576e74036b027cd7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXPHALIGNEN_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga48dd3c6e27d9b5f9576e74036b027cd7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe4b59016643c205c7e6bc153dd705dc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafe4b59016643c205c7e6bc153dd705dc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXPHDLYPD_MASK</b>(Ch)&#160;&#160;&#160;(0x08 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gafe4b59016643c205c7e6bc153dd705dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab217c12b95120729d0116a0ef1d722c5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab217c12b95120729d0116a0ef1d722c5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXPHINIT_MASK</b>(Ch)&#160;&#160;&#160;(0x10 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gab217c12b95120729d0116a0ef1d722c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17ec8960feb1521f1307160d1492a399"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga17ec8960feb1521f1307160d1492a399"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXDLYRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x20 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga17ec8960feb1521f1307160d1492a399"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga24f8180eefdcb6dceb9efd01cfdf989e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga24f8180eefdcb6dceb9efd01cfdf989e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXDLYBYPASS_MASK</b>(Ch)&#160;&#160;&#160;(0x40 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga24f8180eefdcb6dceb9efd01cfdf989e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga80cc550f9b373fc7dd77193e00f2e2fa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga80cc550f9b373fc7dd77193e00f2e2fa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_BUFFER_BYPASS_TXDLYEN_MASK</b>(Ch)&#160;&#160;&#160;(0x80 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga80cc550f9b373fc7dd77193e00f2e2fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga80a43aae97334733e3cab1f3c015a84c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga80a43aae97334733e3cab1f3c015a84c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_TXPHALIGNDONE_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga80a43aae97334733e3cab1f3c015a84c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga562ef720a1543290b181675b60363ae1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga562ef720a1543290b181675b60363ae1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_TXPHINITDONE_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga562ef720a1543290b181675b60363ae1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga97f88eff7246d392e51b4968f6a2f242"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga97f88eff7246d392e51b4968f6a2f242"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_TXDLYRESETDONE_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga97f88eff7246d392e51b4968f6a2f242"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf12c6a005c43f0f203a923f2fdcd65d2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf12c6a005c43f0f203a923f2fdcd65d2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_TXBUFSTATUS_MASK</b>(Ch)&#160;&#160;&#160;(0x18 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gaf12c6a005c43f0f203a923f2fdcd65d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac9d4c007c5520d29804ce2c70eb217ca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac9d4c007c5520d29804ce2c70eb217ca"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_STATUS_TXBUFSTATUS_SHIFT</b>(Ch)&#160;&#160;&#160;(3 + (8 * (Ch - 1)))</td></tr>
<tr class="separator:gac9d4c007c5520d29804ce2c70eb217ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9146c8d1b3e398291fe2e088ae6a8af8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9146c8d1b3e398291fe2e088ae6a8af8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXDIFFCTRL_MASK</b>(Ch)&#160;&#160;&#160;(0x000F &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
<tr class="separator:ga9146c8d1b3e398291fe2e088ae6a8af8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga276b4a2ba021b7c0bb1653022c52d0cc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga276b4a2ba021b7c0bb1653022c52d0cc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXDIFFCTRL_SHIFT</b>(Ch)&#160;&#160;&#160;(16 * ((Ch - 1) % 2))</td></tr>
<tr class="separator:ga276b4a2ba021b7c0bb1653022c52d0cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6354016146e9b468f0f9aea751783eb4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6354016146e9b468f0f9aea751783eb4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXELECIDLE_MASK</b>(Ch)&#160;&#160;&#160;(0x0010 &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
<tr class="separator:ga6354016146e9b468f0f9aea751783eb4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9c2fe8ddb903a0643bf34cb403e8936a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9c2fe8ddb903a0643bf34cb403e8936a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXELECIDLE_SHIFT</b>(Ch)&#160;&#160;&#160;(4 + (16 * ((Ch - 1) % 2)))</td></tr>
<tr class="separator:ga9c2fe8ddb903a0643bf34cb403e8936a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaba5b5f846e258a6d969b4668f67e9d8b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaba5b5f846e258a6d969b4668f67e9d8b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXINHIBIT_MASK</b>(Ch)&#160;&#160;&#160;(0x0020 &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
<tr class="separator:gaba5b5f846e258a6d969b4668f67e9d8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa14e63e22c73d115942f8a94450e13b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaa14e63e22c73d115942f8a94450e13b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXINHIBIT_SHIFT</b>(Ch)&#160;&#160;&#160;(5 + (16 * ((Ch - 1) % 2)))</td></tr>
<tr class="separator:gaaa14e63e22c73d115942f8a94450e13b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d397ecbde2b854c7ea482ed1c3bd9bd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9d397ecbde2b854c7ea482ed1c3bd9bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXPOSTCURSOR_MASK</b>(Ch)&#160;&#160;&#160;(0x07C0 &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
<tr class="separator:ga9d397ecbde2b854c7ea482ed1c3bd9bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga703cd458f471cb0ff1bdfc60ac12b838"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga703cd458f471cb0ff1bdfc60ac12b838"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXPOSTCURSOR_SHIFT</b>(Ch)&#160;&#160;&#160;(6 + (16 * ((Ch - 1) % 2)))</td></tr>
<tr class="separator:ga703cd458f471cb0ff1bdfc60ac12b838"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga43d4d1c305e9f6d62923a7e5a09f0cd7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga43d4d1c305e9f6d62923a7e5a09f0cd7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXPRECURSOR_MASK</b>(Ch)&#160;&#160;&#160;(0xF800 &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
<tr class="separator:ga43d4d1c305e9f6d62923a7e5a09f0cd7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8285fb936cf4e0cc9192275c0beb9767"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8285fb936cf4e0cc9192275c0beb9767"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_TXPRECURSOR_SHIFT</b>(Ch)&#160;&#160;&#160;(11 + (16 * ((Ch - 1) % 2)))</td></tr>
<tr class="separator:ga8285fb936cf4e0cc9192275c0beb9767"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad24e0d8a1cd0bb9591fb08e258b61737"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad24e0d8a1cd0bb9591fb08e258b61737"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_EXT_TXDIFFCTRL_MASK</b>(Ch)&#160;&#160;&#160;(0x0001 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gad24e0d8a1cd0bb9591fb08e258b61737"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0d6924e64e6ae86c1218e26ba4a8c417"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0d6924e64e6ae86c1218e26ba4a8c417"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_DRIVER_EXT_TXDIFFCTRL_SHIFT</b>(Ch)&#160;&#160;&#160;(8 * (Ch - 1))</td></tr>
<tr class="separator:ga0d6924e64e6ae86c1218e26ba4a8c417"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5fc5546aa5480891f42374dd1e2877e7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5fc5546aa5480891f42374dd1e2877e7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_RATE_MASK</b>(Ch)&#160;&#160;&#160;(0x00FF &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
<tr class="separator:ga5fc5546aa5480891f42374dd1e2877e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacf4213cdeaba318f7ae17fbac8fdd65e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gacf4213cdeaba318f7ae17fbac8fdd65e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_TX_RATE_SHIFT</b>(Ch)&#160;&#160;&#160;(16 * ((Ch - 1) % 2))</td></tr>
<tr class="separator:gacf4213cdeaba318f7ae17fbac8fdd65e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5bd17d5eb4bc5f39bc97edf6f73479ce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5bd17d5eb4bc5f39bc97edf6f73479ce"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_RATE_MASK</b>(Ch)&#160;&#160;&#160;(0x00FF &lt;&lt; (16 * ((Ch - 1) % 2)))</td></tr>
<tr class="separator:ga5bd17d5eb4bc5f39bc97edf6f73479ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2a8559f2be1d3fc276f664304b97fe9a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a8559f2be1d3fc276f664304b97fe9a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_RATE_SHIFT</b>(Ch)&#160;&#160;&#160;(16 * ((Ch - 1) % 2))</td></tr>
<tr class="separator:ga2a8559f2be1d3fc276f664304b97fe9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga25d36266b17791d4251e0cbd337e7278"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga25d36266b17791d4251e0cbd337e7278"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RX8B10BEN_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga25d36266b17791d4251e0cbd337e7278"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga65c5ab2772ec196c2260c872fb4e902b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga65c5ab2772ec196c2260c872fb4e902b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RX8B10BEN_ALL_MASK</b></td></tr>
<tr class="separator:ga65c5ab2772ec196c2260c872fb4e902b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac8dc23e5f4f7e97f828825f02c359390"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac8dc23e5f4f7e97f828825f02c359390"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPOLARITY_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gac8dc23e5f4f7e97f828825f02c359390"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3880e30c4d9bcf753913f5c5700331e6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3880e30c4d9bcf753913f5c5700331e6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPOLARITY_ALL_MASK</b></td></tr>
<tr class="separator:ga3880e30c4d9bcf753913f5c5700331e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae8b453ae5cecde2bb4ba1278d8da8a23"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae8b453ae5cecde2bb4ba1278d8da8a23"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPRBSCNTRESET_MASK</b>(Ch)&#160;&#160;&#160;(0x08 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gae8b453ae5cecde2bb4ba1278d8da8a23"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab79e92f8404423e627e64a75c724222d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab79e92f8404423e627e64a75c724222d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPRBSSEL_MASK</b>(Ch)&#160;&#160;&#160;(0xF0 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gab79e92f8404423e627e64a75c724222d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5da1777c226e530449e2598ea8ab15b2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5da1777c226e530449e2598ea8ab15b2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPRBSSEL_ALL_MASK</b></td></tr>
<tr class="separator:ga5da1777c226e530449e2598ea8ab15b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga14229dcc0eb61bc516849a87a536c0ec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga14229dcc0eb61bc516849a87a536c0ec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXPRBSSEL_SHIFT</b>(Ch)&#160;&#160;&#160;(4 + (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga14229dcc0eb61bc516849a87a536c0ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gada861bd8e55d50cacaadf5898c4fb64c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gada861bd8e55d50cacaadf5898c4fb64c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXCDRLOCK_MASK</b>(Ch)&#160;&#160;&#160;(0x1 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gada861bd8e55d50cacaadf5898c4fb64c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabc3d52c0dfe3cbf4729a0f5688fcb304"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabc3d52c0dfe3cbf4729a0f5688fcb304"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXBUFSTATUS_MASK</b>(Ch)&#160;&#160;&#160;(0xE &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gabc3d52c0dfe3cbf4729a0f5688fcb304"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga02b5da11a6e11bc0edc5232ab4571e32"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga02b5da11a6e11bc0edc5232ab4571e32"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXBUFSTATUS_SHIFT</b>(Ch)&#160;&#160;&#160;(1 + (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga02b5da11a6e11bc0edc5232ab4571e32"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga155d7fcf7931f1703e16c4686804560b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga155d7fcf7931f1703e16c4686804560b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXLPMEN_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga155d7fcf7931f1703e16c4686804560b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe85cce445923842c0158c996b2645e5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafe85cce445923842c0158c996b2645e5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXCDRHOLD_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gafe85cce445923842c0158c996b2645e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5e7947017f11726441ff6360a7107598"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5e7947017f11726441ff6360a7107598"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXOSOVRDEN_MASK</b>(Ch)&#160;&#160;&#160;(0x04 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga5e7947017f11726441ff6360a7107598"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf8e8da216e3b4c539b4e8d522eb802c5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf8e8da216e3b4c539b4e8d522eb802c5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXLPMLFKLOVRDEN_MASK</b>(Ch)&#160;&#160;&#160;(0x08 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gaf8e8da216e3b4c539b4e8d522eb802c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad6c2beb4a559a4200dc29cafa196d10b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad6c2beb4a559a4200dc29cafa196d10b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_STATUS_RXLPMHFOVRDEN_MASK</b>(Ch)&#160;&#160;&#160;(0x10 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:gad6c2beb4a559a4200dc29cafa196d10b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac56db6d8637b21c88050b3820c84bb90"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac56db6d8637b21c88050b3820c84bb90"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_RX_CONTROL_RXLPMEN_ALL_MASK</b></td></tr>
<tr class="separator:gac56db6d8637b21c88050b3820c84bb90"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga08d7e791a18aa22b2a32d2e8df421751"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga08d7e791a18aa22b2a32d2e8df421751"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXRESETDONE_MASK</b>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="separator:ga08d7e791a18aa22b2a32d2e8df421751"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga303c5a714924fc672ac64c791f714711"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga303c5a714924fc672ac64c791f714711"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RXRESETDONE_MASK</b>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="separator:ga303c5a714924fc672ac64c791f714711"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6b1b9509b2f52223f2f9aba896a88ba5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6b1b9509b2f52223f2f9aba896a88ba5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_CPLL_LOCK_MASK</b>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="separator:ga6b1b9509b2f52223f2f9aba896a88ba5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga65431b2bb172cc7eb67593ae13a0af45"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga65431b2bb172cc7eb67593ae13a0af45"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_QPLL0_LOCK_MASK</b>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="separator:ga65431b2bb172cc7eb67593ae13a0af45"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab9560a38524678e88111ed41fb23753f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab9560a38524678e88111ed41fb23753f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_LCPLL_LOCK_MASK</b>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="separator:gab9560a38524678e88111ed41fb23753f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1c36288d6f453facbea131251d79e02f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1c36288d6f453facbea131251d79e02f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXALIGNDONE_MASK</b>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="separator:ga1c36288d6f453facbea131251d79e02f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga89231349ffc76e466589c9ddb8ded9ff"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga89231349ffc76e466589c9ddb8ded9ff"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_QPLL1_LOCK_MASK</b>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="separator:ga89231349ffc76e466589c9ddb8ded9ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga14bcc68e99b100d602996998a59b4bad"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga14bcc68e99b100d602996998a59b4bad"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RPLL_LOCK_MASK</b>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="separator:ga14bcc68e99b100d602996998a59b4bad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf90c04d9c912f4cdc6dab57c3bd11262"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf90c04d9c912f4cdc6dab57c3bd11262"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXCLKDETFREQCHANGE_MASK</b>&#160;&#160;&#160;0x00000040</td></tr>
<tr class="separator:gaf90c04d9c912f4cdc6dab57c3bd11262"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab81b8015f263ea1e17ac150fd3ca36d7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab81b8015f263ea1e17ac150fd3ca36d7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RXCLKDETFREQCHANGE_MASK</b>&#160;&#160;&#160;0x00000080</td></tr>
<tr class="separator:gab81b8015f263ea1e17ac150fd3ca36d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad535c4ad5022a439eefad33e5df002d6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad535c4ad5022a439eefad33e5df002d6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXMMCMUSRCLK_LOCK_MASK</b>&#160;&#160;&#160;0x00000200</td></tr>
<tr class="separator:gad535c4ad5022a439eefad33e5df002d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5123f90ee1bfd5050c590600d62d88cd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5123f90ee1bfd5050c590600d62d88cd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RXMMCMUSRCLK_LOCK_MASK</b>&#160;&#160;&#160;0x00000400</td></tr>
<tr class="separator:ga5123f90ee1bfd5050c590600d62d88cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3bdd01ef3fdba2c4766442ee4f718736"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3bdd01ef3fdba2c4766442ee4f718736"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXGPO_RE_MASK</b>&#160;&#160;&#160;0x00000800</td></tr>
<tr class="separator:ga3bdd01ef3fdba2c4766442ee4f718736"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga25cefc55bbab7d7a5b0cbc20affcf8fc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga25cefc55bbab7d7a5b0cbc20affcf8fc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RXGPO_RE_MASK</b>&#160;&#160;&#160;0x00001000</td></tr>
<tr class="separator:ga25cefc55bbab7d7a5b0cbc20affcf8fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga463c11d842a592af68c74d2a7e726b0e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga463c11d842a592af68c74d2a7e726b0e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_TXTMRTIMEOUT_MASK</b>&#160;&#160;&#160;0x40000000</td></tr>
<tr class="separator:ga463c11d842a592af68c74d2a7e726b0e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaf4a402e74f2e6e7c309d7f89fede8f1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaaf4a402e74f2e6e7c309d7f89fede8f1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_RXTMRTIMEOUT_MASK</b>&#160;&#160;&#160;0x80000000</td></tr>
<tr class="separator:gaaf4a402e74f2e6e7c309d7f89fede8f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac583d41cc67a7a8e5acb148acd72a313"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac583d41cc67a7a8e5acb148acd72a313"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_INTR_QPLL_LOCK_MASK</b>&#160;&#160;&#160;XHDMIPHY1_INTR_QPLL0_LOCK_MASK</td></tr>
<tr class="separator:gac583d41cc67a7a8e5acb148acd72a313"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga568a7b48787a44bedf925a60a868e39e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga568a7b48787a44bedf925a60a868e39e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_CFG_NEW_MASK</b>&#160;&#160;&#160;0x01</td></tr>
<tr class="separator:ga568a7b48787a44bedf925a60a868e39e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga79e1595e839fb577374e56ace0b2cbcc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga79e1595e839fb577374e56ace0b2cbcc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_RST_MASK</b>&#160;&#160;&#160;0x02</td></tr>
<tr class="separator:ga79e1595e839fb577374e56ace0b2cbcc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga82dcf54e1b6d0473d5c6a19c31a0f4b8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga82dcf54e1b6d0473d5c6a19c31a0f4b8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_CFG_SUCCESS_MASK</b>&#160;&#160;&#160;0x10</td></tr>
<tr class="separator:ga82dcf54e1b6d0473d5c6a19c31a0f4b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf036771660bfe436d6252b686bd2b4e7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf036771660bfe436d6252b686bd2b4e7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_LOCKED_MASK</b>&#160;&#160;&#160;0x200</td></tr>
<tr class="separator:gaf036771660bfe436d6252b686bd2b4e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf20d8ffdc26d0429cc715bb9e8f571f1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf20d8ffdc26d0429cc715bb9e8f571f1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_PWRDWN_MASK</b>&#160;&#160;&#160;0x400</td></tr>
<tr class="separator:gaf20d8ffdc26d0429cc715bb9e8f571f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3dae0dbe811b68934702b0ec8a85c2f6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga3dae0dbe811b68934702b0ec8a85c2f6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_LOCKED_MASK_MASK</b>&#160;&#160;&#160;0x800</td></tr>
<tr class="separator:ga3dae0dbe811b68934702b0ec8a85c2f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae6015b8e8f122adae6ae1d33edc240ce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae6015b8e8f122adae6ae1d33edc240ce"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_CTRL_CLKINSEL_MASK</b>&#160;&#160;&#160;0x1000</td></tr>
<tr class="separator:gae6015b8e8f122adae6ae1d33edc240ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1be48f2709f0de5609d2dca781575ff0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga1be48f2709f0de5609d2dca781575ff0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG1_DIVCLK_MASK</b>&#160;&#160;&#160;0x00000FF</td></tr>
<tr class="separator:ga1be48f2709f0de5609d2dca781575ff0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga225f67e27844df06fff1d11009cb82c2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga225f67e27844df06fff1d11009cb82c2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG1_CLKFBOUT_MULT_MASK</b>&#160;&#160;&#160;0x000FF00</td></tr>
<tr class="separator:ga225f67e27844df06fff1d11009cb82c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d6b8da954a222896cd4aa0cfda06548"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9d6b8da954a222896cd4aa0cfda06548"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG1_CLKFBOUT_MULT_SHIFT</b>&#160;&#160;&#160;8</td></tr>
<tr class="separator:ga9d6b8da954a222896cd4aa0cfda06548"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga04ad9931db524d6512b0e30a84222e8b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga04ad9931db524d6512b0e30a84222e8b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG1_CLKFBOUT_FRAC_MASK</b>&#160;&#160;&#160;0x3FF0000</td></tr>
<tr class="separator:ga04ad9931db524d6512b0e30a84222e8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabfd910185233c84dc77073e8e2056563"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabfd910185233c84dc77073e8e2056563"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG1_CLKFBOUT_FRAC_SHIFT</b>&#160;&#160;&#160;16</td></tr>
<tr class="separator:gabfd910185233c84dc77073e8e2056563"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0caf6d1912e4f2ff0e1fbcb1facc84a0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0caf6d1912e4f2ff0e1fbcb1facc84a0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG2_DIVCLK_MASK</b>&#160;&#160;&#160;0x00000FF</td></tr>
<tr class="separator:ga0caf6d1912e4f2ff0e1fbcb1facc84a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa569eb0ee074072b27d88d7d70231e50"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa569eb0ee074072b27d88d7d70231e50"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG2_CLKOUT0_FRAC_MASK</b>&#160;&#160;&#160;0x3FF0000</td></tr>
<tr class="separator:gaa569eb0ee074072b27d88d7d70231e50"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga942211c22519641b3df31e3c0b26c1d9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga942211c22519641b3df31e3c0b26c1d9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG2_CLKOUT0_FRAC_SHIFT</b>&#160;&#160;&#160;16</td></tr>
<tr class="separator:ga942211c22519641b3df31e3c0b26c1d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6490ce7ab911144b6879ab2957de3720"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6490ce7ab911144b6879ab2957de3720"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MMCM_USRCLK_REG34_DIVCLK_MASK</b>&#160;&#160;&#160;0x00000FF</td></tr>
<tr class="separator:ga6490ce7ab911144b6879ab2957de3720"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga525446e35d117e950594bfe260c8cfbf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga525446e35d117e950594bfe260c8cfbf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BUFGGT_XXUSRCLK_CLR_MASK</b>&#160;&#160;&#160;0x1</td></tr>
<tr class="separator:ga525446e35d117e950594bfe260c8cfbf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4916d22f33d67cb704a60cb430807461"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4916d22f33d67cb704a60cb430807461"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BUFGGT_XXUSRCLK_DIV_MASK</b>&#160;&#160;&#160;0xE</td></tr>
<tr class="separator:ga4916d22f33d67cb704a60cb430807461"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabafee997a4051d2c94f6989337990f8d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabafee997a4051d2c94f6989337990f8d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_BUFGGT_XXUSRCLK_DIV_SHIFT</b>&#160;&#160;&#160;1</td></tr>
<tr class="separator:gabafee997a4051d2c94f6989337990f8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga36c64156c066d9ad67b14eedb50c837c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga36c64156c066d9ad67b14eedb50c837c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MISC_XXUSRCLK_CKOUT1_OEN_MASK</b>&#160;&#160;&#160;0x1</td></tr>
<tr class="separator:ga36c64156c066d9ad67b14eedb50c837c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabca4ddf3d52bfb382d8492f0121facbf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabca4ddf3d52bfb382d8492f0121facbf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_MISC_XXUSRCLK_REFCLK_CEB_MASK</b>&#160;&#160;&#160;0x2</td></tr>
<tr class="separator:gabca4ddf3d52bfb382d8492f0121facbf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga01ad747fb5b3356e39f7f824f089273c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga01ad747fb5b3356e39f7f824f089273c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_RUN_MASK</b>&#160;&#160;&#160;0x1</td></tr>
<tr class="separator:ga01ad747fb5b3356e39f7f824f089273c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9eec49cf1d589566a74f39501dbe01b9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9eec49cf1d589566a74f39501dbe01b9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_TX_TMR_CLR_MASK</b>&#160;&#160;&#160;0x2</td></tr>
<tr class="separator:ga9eec49cf1d589566a74f39501dbe01b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabff43e2536f0ed294a7b5c5b3518beb6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabff43e2536f0ed294a7b5c5b3518beb6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_RX_TMR_CLR_MASK</b>&#160;&#160;&#160;0x4</td></tr>
<tr class="separator:gabff43e2536f0ed294a7b5c5b3518beb6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf85ce0c9dee041320915581369eb2710"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf85ce0c9dee041320915581369eb2710"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_TX_FREQ_RST_MASK</b>&#160;&#160;&#160;0x8</td></tr>
<tr class="separator:gaf85ce0c9dee041320915581369eb2710"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf3c5d0b73a570717ea6d6253fbdf687f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf3c5d0b73a570717ea6d6253fbdf687f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_RX_FREQ_RST_MASK</b>&#160;&#160;&#160;0x10</td></tr>
<tr class="separator:gaf3c5d0b73a570717ea6d6253fbdf687f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga55b4884cafdedfcc609fc1d6abdc1faa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga55b4884cafdedfcc609fc1d6abdc1faa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_FREQ_LOCK_THRESH_MASK</b>&#160;&#160;&#160;0x1FE0</td></tr>
<tr class="separator:ga55b4884cafdedfcc609fc1d6abdc1faa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd6843aa2390ba4a4487f546a36760d5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadd6843aa2390ba4a4487f546a36760d5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_FREQ_LOCK_THRESH_SHIFT</b>&#160;&#160;&#160;5</td></tr>
<tr class="separator:gadd6843aa2390ba4a4487f546a36760d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2e122f7af068ec9310648e3c9bdc56cc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2e122f7af068ec9310648e3c9bdc56cc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_ACCURACY_RANGE_MASK</b>&#160;&#160;&#160;0x1E000</td></tr>
<tr class="separator:ga2e122f7af068ec9310648e3c9bdc56cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7e282b45967ddae1445ed507d5d6f82f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7e282b45967ddae1445ed507d5d6f82f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_CTRL_ACCURACY_RANGE_SHIFT</b>&#160;&#160;&#160;13</td></tr>
<tr class="separator:ga7e282b45967ddae1445ed507d5d6f82f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0cb29e80856b4182da48e89f48956540"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0cb29e80856b4182da48e89f48956540"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_STAT_TX_FREQ_ZERO_MASK</b>&#160;&#160;&#160;0x1</td></tr>
<tr class="separator:ga0cb29e80856b4182da48e89f48956540"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2b54d50a6ed4d571ce22e64601a7e21e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2b54d50a6ed4d571ce22e64601a7e21e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_STAT_RX_FREQ_ZERO_MASK</b>&#160;&#160;&#160;0x2</td></tr>
<tr class="separator:ga2b54d50a6ed4d571ce22e64601a7e21e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4a78b927f125bc2d6496760def90ac18"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4a78b927f125bc2d6496760def90ac18"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_STAT_TX_REFCLK_LOCK_MASK</b>&#160;&#160;&#160;0x3</td></tr>
<tr class="separator:ga4a78b927f125bc2d6496760def90ac18"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4b03770677a9d18e9dcecb8eadc7c0c2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga4b03770677a9d18e9dcecb8eadc7c0c2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_CLKDET_STAT_TX_REFCLK_LOCK_CAP_MASK</b>&#160;&#160;&#160;0x4</td></tr>
<tr class="separator:ga4b03770677a9d18e9dcecb8eadc7c0c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga05ed634887e0d164f25ed529023c35ea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga05ed634887e0d164f25ed529023c35ea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CTRL_RST_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga05ed634887e0d164f25ed529023c35ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga38db63b9227d04cdc293b828836dc659"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga38db63b9227d04cdc293b828836dc659"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CTRL_EN_MASK</b>(Ch)&#160;&#160;&#160;(0x02 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga38db63b9227d04cdc293b828836dc659"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2cc4e02fe64fcbd3f59f5c8a1af77688"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2cc4e02fe64fcbd3f59f5c8a1af77688"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_STAT_ACTIVE_MASK</b>(Ch)&#160;&#160;&#160;(0x01 &lt;&lt; (8 * (Ch - 1)))</td></tr>
<tr class="separator:ga2cc4e02fe64fcbd3f59f5c8a1af77688"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga80c2913e4a96852bad7775c9bf491172"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga80c2913e4a96852bad7775c9bf491172"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_STAT_VERSION_MASK</b>&#160;&#160;&#160;0xFF000000</td></tr>
<tr class="separator:ga80c2913e4a96852bad7775c9bf491172"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6a8236aa311847cb3edec78e11dba363"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6a8236aa311847cb3edec78e11dba363"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_STAT_VERSION_SHIFT</b>&#160;&#160;&#160;24</td></tr>
<tr class="separator:ga6a8236aa311847cb3edec78e11dba363"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9491768c5c9344a36f078a789c6eacd8"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9491768c5c9344a36f078a789c6eacd8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_CFREQ_H_MASK</b>&#160;&#160;&#160;0x1F</td></tr>
<tr class="separator:ga9491768c5c9344a36f078a789c6eacd8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae80f530bf7ebc2119e2d0ccb3763aadc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae80f530bf7ebc2119e2d0ccb3763aadc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G1_MASK</b>&#160;&#160;&#160;0x00001F</td></tr>
<tr class="separator:gae80f530bf7ebc2119e2d0ccb3763aadc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae55df5153974c9c88af0816f87d4e157"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae55df5153974c9c88af0816f87d4e157"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G1_SHIFT</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:gae55df5153974c9c88af0816f87d4e157"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9e8cdadea96c4ad27f54c11e39df9c10"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9e8cdadea96c4ad27f54c11e39df9c10"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G1_P_MASK</b>&#160;&#160;&#160;0x001F00</td></tr>
<tr class="separator:ga9e8cdadea96c4ad27f54c11e39df9c10"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga72f6ea8ec24fc2384d25100adac60c3a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga72f6ea8ec24fc2384d25100adac60c3a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G1_P_SHIFT</b>&#160;&#160;&#160;8</td></tr>
<tr class="separator:ga72f6ea8ec24fc2384d25100adac60c3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad4c076358b2fbdba45182e158192eb0c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad4c076358b2fbdba45182e158192eb0c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G2_MASK</b>&#160;&#160;&#160;0x1F0000</td></tr>
<tr class="separator:gad4c076358b2fbdba45182e158192eb0c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga06c6db71d26f22c6d8c093ab0f4929e3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga06c6db71d26f22c6d8c093ab0f4929e3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_DRU_GAIN_G2_SHIFT</b>&#160;&#160;&#160;16</td></tr>
<tr class="separator:ga06c6db71d26f22c6d8c093ab0f4929e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf7a35629889a320acf5c8fb2d3d46e27"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf7a35629889a320acf5c8fb2d3d46e27"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PATGEN_CTRL_ENABLE_MASK</b>&#160;&#160;&#160;0x80000000</td></tr>
<tr class="separator:gaf7a35629889a320acf5c8fb2d3d46e27"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6d3e0f9388f8206161acc9fe1774533e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6d3e0f9388f8206161acc9fe1774533e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PATGEN_CTRL_ENABLE_SHIFT</b>&#160;&#160;&#160;31</td></tr>
<tr class="separator:ga6d3e0f9388f8206161acc9fe1774533e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0a68d51bff2ef96038238dce94500939"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0a68d51bff2ef96038238dce94500939"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PATGEN_CTRL_RATIO_MASK</b>&#160;&#160;&#160;0x7</td></tr>
<tr class="separator:ga0a68d51bff2ef96038238dce94500939"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2177df706f222d293403a8249d581fa1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2177df706f222d293403a8249d581fa1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHDMIPHY1_PATGEN_CTRL_RATIO_SHIFT</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:ga2177df706f222d293403a8249d581fa1"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Register access macro definitions.</h2></td></tr>
<tr class="memitem:gab823a99a19932f5d6a18ed1a39e02bcb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab823a99a19932f5d6a18ed1a39e02bcb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHdmiphy1_In32</b>&#160;&#160;&#160;Xil_In32</td></tr>
<tr class="separator:gab823a99a19932f5d6a18ed1a39e02bcb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga58c27db2c6a39be070be3b932e607655"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga58c27db2c6a39be070be3b932e607655"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XHdmiphy1_Out32</b>&#160;&#160;&#160;Xil_Out32</td></tr>
<tr class="separator:ga58c27db2c6a39be070be3b932e607655"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="ga962d997981e2e284c3c9dd0e8a9a5752"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XHdmiphy1_ReadReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;XHdmiphy1_In32((BaseAddress) + (RegOffset))</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This is a low-level function that reads from the specified register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>is the base address of the device. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset to be read from.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The 32-bit value of the specified register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: u32 <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752" title="This is a low-level function that reads from the specified register. ">XHdmiphy1_ReadReg(u32 BaseAddress, u32 RegOffset)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa113dd9ce96c346ef9b757947eb340fe">XHdmiphy1_ClkDetAccuracyRange()</a>, <a class="el" href="group__xhdmiphy1.html#gafaece55136a95db26cf37edcd53c96f8">XHdmiphy1_ClkDetCheckFreqZero()</a>, <a class="el" href="group__xhdmiphy1.html#gab2369998b0e4635bced93881e51cc8fe">XHdmiphy1_ClkDetEnable()</a>, <a class="el" href="group__xhdmiphy1.html#gac39e0926826a1e127514c8350ddcde21">XHdmiphy1_ClkDetFreqReset()</a>, <a class="el" href="group__xhdmiphy1.html#gabb75647ab6dfd99febccba18593e86d8">XHdmiphy1_ClkDetGetRefClkFreqHz()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a055146c6b3aa1da1991a0041dc11f7">XHdmiphy1_ClkDetSetFreqLockThreshold()</a>, <a class="el" href="group__xhdmiphy1.html#gac2f877b2581399c3344d1555d05df2df">XHdmiphy1_ClkDetTimerClear()</a>, <a class="el" href="group__xhdmiphy1.html#gab511031505e9679f2bd243d68eb725f4">XHdmiphy1_Clkout1OBufTdsEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga7b7a69d580eaac17960b977851aead25">XHdmiphy1_DruEnable()</a>, <a class="el" href="group__xhdmiphy1.html#gae2d190888890d12b1524b5d5065e5e57">XHdmiphy1_DruGetRefClkFreqHz()</a>, <a class="el" href="group__xhdmiphy1.html#gab5da59924fa5189f7141d950e6d31a50">XHdmiphy1_DruGetVersion()</a>, <a class="el" href="group__xhdmiphy1.html#ga5ccf265013fcb1e013775dc9a8563c87">XHdmiphy1_DruReset()</a>, <a class="el" href="group__xhdmiphy1.html#gaa91560e5b99db9d90042b548a76da7a6">XHdmiphy1_GetSysClkDataSel()</a>, <a class="el" href="group__xhdmiphy1.html#gabf0e7c8a542401ba275640fabee19940">XHdmiphy1_GetSysClkOutSel()</a>, <a class="el" href="group__xhdmiphy1.html#gaf6a4e05c5b6141f00bdfa2ae1f30b15a">XHdmiphy1_GetVersion()</a>, <a class="el" href="group__xhdmiphy1.html#gaff834a7a15854c09af35144299a4f980">XHdmiphy1_GtUserRdyEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga16dfea31e43d9da2c4c00cd0785b6248">XHdmiphy1_HdmiDebugInfo()</a>, <a class="el" href="group__xhdmiphy1.html#gae9070f7158ccb8538edf80a5ec4c8da6">XHdmiphy1_HdmiGtDruModeEnable()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a0c603299dc1bafabcf0ecfe920bd412b">XHdmiphy1_HdmiGtRxResetDoneLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#ad65db64a87467172db631b182c2ddd2d">XHdmiphy1_HdmiGtTxResetDoneLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#afc3e2c76a28022e9d12a96990cc2fc83">XHdmiphy1_HdmiTxClkDetFreqChangeHandler()</a>, <a class="el" href="group__xhdmiphy1.html#ga57aac6b723825d9999dc5419d067bda3">XHdmiphy1_IBufDsEnable()</a>, <a class="el" href="group__xhdmiphy1.html#gacb93fcb29ad3045d260d3fbbaa0be81e">XHdmiphy1_InterruptHandler()</a>, <a class="el" href="group__xhdmiphy1.html#gabb09df5f9b1e2f799160dd944d8ae935">XHdmiphy1_IntrDisable()</a>, <a class="el" href="group__xhdmiphy1.html#gaf1923a89392fcc152f571818d2ad564f">XHdmiphy1_IntrEnable()</a>, <a class="el" href="group__xhdmiphy1.html#gac05b90ab984e726f1ddde5cf265915d9">XHdmiphy1_IsPllLocked()</a>, <a class="el" href="group__xhdmiphy1.html#ga0b46b7c2c9c6d5fbe7e7c2a6d226b985">XHdmiphy1_MmcmLocked()</a>, <a class="el" href="group__xhdmiphy1.html#ga6d652ca1a4650bc5a2762d381a110f6b">XHdmiphy1_MmcmLockedMaskEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga13859cf616b98f6d37336128b9f3f21a">XHdmiphy1_MmcmPowerDown()</a>, <a class="el" href="group__xhdmiphy1.html#ga47707c2203c7788afdfb22fe1ae438db">XHdmiphy1_MmcmReset()</a>, <a class="el" href="group__xhdmiphy1.html#ga2b93ca125219d62f19817168267ddfc5">XHdmiphy1_MmcmSetClkinsel()</a>, <a class="el" href="group__xhdmiphy1.html#gafe6529e3429c7199f87f7f8fc7f43fe0">XHdmiphy1_PatgenEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga51d10d93fa76ebe0c031600b61955d4d">XHdmiphy1_PatgenSetRatio()</a>, <a class="el" href="group__xhdmiphy1.html#gaf1fbb7de9d26abab7332a62932be9d85">XHdmiphy1_PowerDownGtPll()</a>, <a class="el" href="group__xhdmiphy1.html#ga8dc19df05e15d413e62ff62d2c22c023">XHdmiphy1_RegisterDebug()</a>, <a class="el" href="group__xhdmiphy1.html#ga7f1f22be7f2029c396c015e322475790">XHdmiphy1_ResetGtPll()</a>, <a class="el" href="group__xhdmiphy1.html#ga117b1b06a6044a0574731e960e8e304a">XHdmiphy1_ResetGtTxRx()</a>, <a class="el" href="group__xhdmiphy1.html#ga08947cfedb541b7f95242c82ee60a8c5">XHdmiphy1_SelfTest()</a>, <a class="el" href="group__xhdmiphy1.html#gafb115f999643adac66932d6c4a44de1c">XHdmiphy1_SetBufgGtDiv()</a>, <a class="el" href="group__xhdmiphy1.html#ga615fe597062a12b286153f2ee8007e91">XHdmiphy1_SetPolarity()</a>, <a class="el" href="group__xhdmiphy1.html#ga041ec28c400f1b4cb662d9670e0feff3">XHdmiphy1_SetPrbsSel()</a>, <a class="el" href="group__xhdmiphy1.html#ga704b9c7161c4ac92beaa07113caaa36c">XHdmiphy1_SetRxLpm()</a>, <a class="el" href="group__xhdmiphy1.html#ga755a209f0abe848a3508017f83ad4c62">XHdmiphy1_SetTxPostCursor()</a>, <a class="el" href="group__xhdmiphy1.html#gad9dd0d271c9be7416e55adc535257cea">XHdmiphy1_SetTxPreEmphasis()</a>, <a class="el" href="group__xhdmiphy1.html#gaa01b2c0214336ba205fcac3c8fd7675d">XHdmiphy1_SetTxVoltageSwing()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a355efb9fbbf8e3d0102738e912971bca">XHdmiphy1_TxAlignReset()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a579cfbb41fbd51477dd902f9a1758826">XHdmiphy1_TxAlignStart()</a>, and <a class="el" href="group__xhdmiphy1.html#gae474ac8f1f2997229ec25e7584a4b827">XHdmiphy1_TxPrbsForceError()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf9e55165fdb1fdf467dba14ad5755240"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XHDMIPHY1_VERSION_CORE_PATCH_MASK&#160;&#160;&#160;0x00000F00</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Core patch details. </p>

</div>
</div>
<a class="anchor" id="gab31e816466d00835f4835fecd3513cd0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XHDMIPHY1_VERSION_CORE_PATCH_SHIFT&#160;&#160;&#160;8</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for core patch details. </p>

</div>
</div>
<a class="anchor" id="gaf133797705643b5175c49aa1351a64f9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XHDMIPHY1_VERSION_CORE_VER_MJR_MASK&#160;&#160;&#160;0xFF000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Core major version. </p>

</div>
</div>
<a class="anchor" id="ga3739592ccb4d12897a34189b354f0fca"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XHDMIPHY1_VERSION_CORE_VER_MJR_SHIFT&#160;&#160;&#160;24</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for core major version. </p>

</div>
</div>
<a class="anchor" id="ga7ef7479579d49362a655572d14196e12"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XHDMIPHY1_VERSION_CORE_VER_MNR_MASK&#160;&#160;&#160;0x00FF0000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Core minor version. </p>

</div>
</div>
<a class="anchor" id="ga045bdbe9f1a6f88f1d320a4b462308de"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XHDMIPHY1_VERSION_CORE_VER_MNR_SHIFT&#160;&#160;&#160;16</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for core minor version. </p>

</div>
</div>
<a class="anchor" id="ga3a16eb39f8a6cb000e6d5fcddbf04b6c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XHDMIPHY1_VERSION_CORE_VER_REV_MASK&#160;&#160;&#160;0x0000F000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Core version revision. </p>

</div>
</div>
<a class="anchor" id="gaefd13bfaf8d5cdf97e44d5479fc26c73"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XHDMIPHY1_VERSION_CORE_VER_REV_SHIFT&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for core version revision. </p>

</div>
</div>
<a class="anchor" id="gab54d4cffc70ebfc28574d58d7965b3c2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XHDMIPHY1_VERSION_INTER_REV_MASK&#160;&#160;&#160;0x000000FF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Internal revision. </p>

</div>
</div>
<a class="anchor" id="ga9e65226a4b7cf835cf8555e84d895555"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XHdmiphy1_WriteReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Data&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;XHdmiphy1_Out32((BaseAddress) + (RegOffset), (Data))</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This is a low-level function that writes to the specified register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>is the base address of the device. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset to write to. </td></tr>
    <tr><td class="paramname">Data</td><td>is the 32-bit data to write to the specified register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555" title="This is a low-level function that writes to the specified register. ">XHdmiphy1_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa113dd9ce96c346ef9b757947eb340fe">XHdmiphy1_ClkDetAccuracyRange()</a>, <a class="el" href="group__xhdmiphy1.html#gab2369998b0e4635bced93881e51cc8fe">XHdmiphy1_ClkDetEnable()</a>, <a class="el" href="group__xhdmiphy1.html#gac39e0926826a1e127514c8350ddcde21">XHdmiphy1_ClkDetFreqReset()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a055146c6b3aa1da1991a0041dc11f7">XHdmiphy1_ClkDetSetFreqLockThreshold()</a>, <a class="el" href="group__xhdmiphy1.html#ga46cb7e8a6cc10a61bbfb7126f85e8cec">XHdmiphy1_ClkDetSetFreqTimeout()</a>, <a class="el" href="group__xhdmiphy1.html#gac2f877b2581399c3344d1555d05df2df">XHdmiphy1_ClkDetTimerClear()</a>, <a class="el" href="group__xhdmiphy1.html#gacbffa1bd1304f2f69a32aa1a22573052">XHdmiphy1_ClkDetTimerLoad()</a>, <a class="el" href="group__xhdmiphy1.html#gab511031505e9679f2bd243d68eb725f4">XHdmiphy1_Clkout1OBufTdsEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga7b7a69d580eaac17960b977851aead25">XHdmiphy1_DruEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga5ccf265013fcb1e013775dc9a8563c87">XHdmiphy1_DruReset()</a>, <a class="el" href="group__xhdmiphy1.html#ga02899710d93b44ffa5d6f87637d67809">XHdmiphy1_DruSetCenterFreqHz()</a>, <a class="el" href="group__xhdmiphy1.html#gaff834a7a15854c09af35144299a4f980">XHdmiphy1_GtUserRdyEnable()</a>, <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>, <a class="el" href="group__xhdmiphy1.html#gae9070f7158ccb8538edf80a5ec4c8da6">XHdmiphy1_HdmiGtDruModeEnable()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a0c603299dc1bafabcf0ecfe920bd412b">XHdmiphy1_HdmiGtRxResetDoneLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#ad65db64a87467172db631b182c2ddd2d">XHdmiphy1_HdmiGtTxResetDoneLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#afc3e2c76a28022e9d12a96990cc2fc83">XHdmiphy1_HdmiTxClkDetFreqChangeHandler()</a>, <a class="el" href="group__xhdmiphy1.html#ga57aac6b723825d9999dc5419d067bda3">XHdmiphy1_IBufDsEnable()</a>, <a class="el" href="group__xhdmiphy1.html#gabb09df5f9b1e2f799160dd944d8ae935">XHdmiphy1_IntrDisable()</a>, <a class="el" href="group__xhdmiphy1.html#gaf1923a89392fcc152f571818d2ad564f">XHdmiphy1_IntrEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga6d652ca1a4650bc5a2762d381a110f6b">XHdmiphy1_MmcmLockedMaskEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga13859cf616b98f6d37336128b9f3f21a">XHdmiphy1_MmcmPowerDown()</a>, <a class="el" href="group__xhdmiphy1.html#ga47707c2203c7788afdfb22fe1ae438db">XHdmiphy1_MmcmReset()</a>, <a class="el" href="group__xhdmiphy1.html#ga2b93ca125219d62f19817168267ddfc5">XHdmiphy1_MmcmSetClkinsel()</a>, <a class="el" href="group__xhdmiphy1.html#gafe6529e3429c7199f87f7f8fc7f43fe0">XHdmiphy1_PatgenEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga51d10d93fa76ebe0c031600b61955d4d">XHdmiphy1_PatgenSetRatio()</a>, <a class="el" href="group__xhdmiphy1.html#gaf1fbb7de9d26abab7332a62932be9d85">XHdmiphy1_PowerDownGtPll()</a>, <a class="el" href="group__xhdmiphy1.html#ga7f1f22be7f2029c396c015e322475790">XHdmiphy1_ResetGtPll()</a>, <a class="el" href="group__xhdmiphy1.html#ga117b1b06a6044a0574731e960e8e304a">XHdmiphy1_ResetGtTxRx()</a>, <a class="el" href="group__xhdmiphy1.html#gafb115f999643adac66932d6c4a44de1c">XHdmiphy1_SetBufgGtDiv()</a>, <a class="el" href="group__xhdmiphy1.html#ga615fe597062a12b286153f2ee8007e91">XHdmiphy1_SetPolarity()</a>, <a class="el" href="group__xhdmiphy1.html#ga041ec28c400f1b4cb662d9670e0feff3">XHdmiphy1_SetPrbsSel()</a>, <a class="el" href="group__xhdmiphy1.html#ga704b9c7161c4ac92beaa07113caaa36c">XHdmiphy1_SetRxLpm()</a>, <a class="el" href="group__xhdmiphy1.html#ga755a209f0abe848a3508017f83ad4c62">XHdmiphy1_SetTxPostCursor()</a>, <a class="el" href="group__xhdmiphy1.html#gad9dd0d271c9be7416e55adc535257cea">XHdmiphy1_SetTxPreEmphasis()</a>, <a class="el" href="group__xhdmiphy1.html#gaa01b2c0214336ba205fcac3c8fd7675d">XHdmiphy1_SetTxVoltageSwing()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a355efb9fbbf8e3d0102738e912971bca">XHdmiphy1_TxAlignReset()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a579cfbb41fbd51477dd902f9a1758826">XHdmiphy1_TxAlignStart()</a>, <a class="el" href="group__xhdmiphy1.html#gae474ac8f1f2997229ec25e7584a4b827">XHdmiphy1_TxPrbsForceError()</a>, and <a class="el" href="group__xhdmiphy1.html#ga0fa2836b8aac17e187bf1e01a462001a">XHdmiphy1_WriteCfgRefClkSelReg()</a>.</p>

</div>
</div>
<h2 class="groupheader">Typedef Documentation</h2>
<a class="anchor" id="ga14ce1c0f480526922f42b9e7ff8dee8f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">typedef void(* XHdmiphy1_Callback)(void *CallbackRef)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Generic callback type. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallbackRef</td><td>is a pointer to the callback reference.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

</div>
</div>
<a class="anchor" id="gadcff193d2a45fbd03c48f595fe8fdf55"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">typedef void(* XHdmiphy1_ErrorCallback)(void *CallbackRef)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Error callback type. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallbackRef</td><td>is a pointer to the callback reference.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

</div>
</div>
<a class="anchor" id="ga5ff00002844b75068ea21b03514fcf04"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">typedef void(* XHdmiphy1_IntrHandler)(void *InstancePtr)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Callback type which represents the handler for interrupts. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

</div>
</div>
<a class="anchor" id="ga503c2ff79c8d1c28506c02d3be634763"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">typedef u64(* XHdmiphy1_LogCallback)(void *CallbackRef)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Generic callback type. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallbackRef</td><td>is a pointer to the callback reference.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>u8 value. </dd></dl>

</div>
</div>
<a class="anchor" id="ga7c61707222943633f7df3de4acf2d51a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">typedef void(* XHdmiphy1_TimerHandler)(void *InstancePtr, u32 MicroSeconds)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Callback type which represents a custom timer wait handler. </p>
<p>This is only used for Microblaze since it doesn't have a native sleep function. To avoid dependency on a hardware timer, the default wait functionality is implemented using loop iterations; this isn't too accurate. If a custom timer handler is used, the user may implement their own wait implementation using a hardware timer (see example/) for better accuracy.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance. </td></tr>
    <tr><td class="paramname">MicroSeconds</td><td>is the number of microseconds to be passed to the timer function.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

</div>
</div>
<h2 class="groupheader">Enumeration Type Documentation</h2>
<a class="anchor" id="ga54f72201d2012e3c638ec92b5e310f23"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This typedef enumerates the available channels. </p>

</div>
</div>
<a class="anchor" id="ga19e4c793abee3457123797eca4f61cd0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#ga19e4c793abee3457123797eca4f61cd0">XHdmiphy1_GtState</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga19e4c793abee3457123797eca4f61cd0abb6da8fd6d31dd97dea1910021b0d8f7"></a>XHDMIPHY1_GT_STATE_IDLE</em>&nbsp;</td><td class="fielddoc">
<p>Idle state. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga19e4c793abee3457123797eca4f61cd0a8237da6c8720d2611ec2eb56927e9fd6"></a>XHDMIPHY1_GT_STATE_GPO_RE</em>&nbsp;</td><td class="fielddoc">
<p>GPO RE state. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga19e4c793abee3457123797eca4f61cd0aeb66246b5c2c3de1c42d34fc8a5a9de2"></a>XHDMIPHY1_GT_STATE_LOCK</em>&nbsp;</td><td class="fielddoc">
<p>Lock state. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga19e4c793abee3457123797eca4f61cd0adbd966511bbee7acb1ce508578605fb6"></a>XHDMIPHY1_GT_STATE_RESET</em>&nbsp;</td><td class="fielddoc">
<p>Reset state. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga19e4c793abee3457123797eca4f61cd0a540efa0ad171c67927e0364e77bf0ab0"></a>XHDMIPHY1_GT_STATE_ALIGN</em>&nbsp;</td><td class="fielddoc">
<p>Align state. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga19e4c793abee3457123797eca4f61cd0af0bd0b978b52982e2caf6a30afc3f57d"></a>XHDMIPHY1_GT_STATE_READY</em>&nbsp;</td><td class="fielddoc">
<p>Ready state. </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="ga8df8a80a15683dd3ffe31d80780f6329"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#ga8df8a80a15683dd3ffe31d80780f6329">XHdmiphy1_HdmiHandlerType</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This typedef enumerates the list of available hdmi handler types. </p>
<p>The values are used as parameters to the XHdmiphy1_SetHdmiCallback function. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga8df8a80a15683dd3ffe31d80780f6329a96b12cc5ff9908c81fcb6231b7aec8ac"></a>XHDMIPHY1_HDMI_HANDLER_TXINIT</em>&nbsp;</td><td class="fielddoc">
<p>TX init handler. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga8df8a80a15683dd3ffe31d80780f6329ae806cfadcc91063cd2bbeb8482f79433"></a>XHDMIPHY1_HDMI_HANDLER_TXREADY</em>&nbsp;</td><td class="fielddoc">
<p>TX ready handler. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga8df8a80a15683dd3ffe31d80780f6329a57c314d217e86af61f9e4e7d6e446e83"></a>XHDMIPHY1_HDMI_HANDLER_RXINIT</em>&nbsp;</td><td class="fielddoc">
<p>RX init handler. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga8df8a80a15683dd3ffe31d80780f6329a419d981d4a35b761784f48e87adba9b3"></a>XHDMIPHY1_HDMI_HANDLER_RXREADY</em>&nbsp;</td><td class="fielddoc">
<p>RX ready handler. </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="ga99fd3078ca6a97efc41ebae0ab9848b4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#ga99fd3078ca6a97efc41ebae0ab9848b4">XHdmiphy1_HdmiTx_Patgen</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga99fd3078ca6a97efc41ebae0ab9848b4a2287e71d5eb5822fdad68ffc7014727d"></a>XHDMIPHY1_Patgen_Ratio_10</em>&nbsp;</td><td class="fielddoc">
<p>LR:Clock Ratio = 10. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga99fd3078ca6a97efc41ebae0ab9848b4a4cd912ee1ca0dcf2908d7da89aa67a8b"></a>XHDMIPHY1_Patgen_Ratio_20</em>&nbsp;</td><td class="fielddoc">
<p>LR:Clock Ratio = 20. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga99fd3078ca6a97efc41ebae0ab9848b4a2110a4eeb03152e3beed98547b3ae92c"></a>XHDMIPHY1_Patgen_Ratio_30</em>&nbsp;</td><td class="fielddoc">
<p>LR:Clock Ratio = 30. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga99fd3078ca6a97efc41ebae0ab9848b4a35d0720f27d6bb3698e239fe2a9e79dd"></a>XHDMIPHY1_Patgen_Ratio_40</em>&nbsp;</td><td class="fielddoc">
<p>LR:Clock Ratio = 40. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga99fd3078ca6a97efc41ebae0ab9848b4a54e14196cdba218c9339ab646bc6f183"></a>XHDMIPHY1_Patgen_Ratio_50</em>&nbsp;</td><td class="fielddoc">
<p>LR:Clock Ratio = 50. </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="ga0babc37b8b55084caeefe57eef4fbd62"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#ga0babc37b8b55084caeefe57eef4fbd62">XHdmiphy1_IntrHandlerType</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This typedef enumerates the list of available interrupt handler types. </p>
<p>The values are used as parameters to the XHdmiphy1_SetIntrHandler function. </p>

</div>
</div>
<a class="anchor" id="ga507763f75897762cabf8819fde24ab8f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#ga507763f75897762cabf8819fde24ab8f">XHdmiphy1_LogEvent</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa05c6742ec935bcbad19af54685b3d9f5"></a>XHDMIPHY1_LOG_EVT_NONE</em>&nbsp;</td><td class="fielddoc">
<p>Log event none. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa91285a2fe900849e83aa45be23b8fc31"></a>XHDMIPHY1_LOG_EVT_QPLL_EN</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa2f2949d1be35d7c96902fe8b031d6251"></a>XHDMIPHY1_LOG_EVT_QPLL_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fae542d14fe31f4366262597571621900b"></a>XHDMIPHY1_LOG_EVT_QPLL_LOCK</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL lock. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fad1a525f5335b7c7814e19fc19e8dee78"></a>XHDMIPHY1_LOG_EVT_QPLL_RECONFIG</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL reconfig. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8faab11ea8cc0444e9eaebfc01d2e25c2e1"></a>XHDMIPHY1_LOG_EVT_QPLL0_EN</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL0 enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa544654893a30ea4372fde78d3da63efe"></a>XHDMIPHY1_LOG_EVT_QPLL0_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL0 reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fab7973c8195409260d4b4c17edd2107f6"></a>XHDMIPHY1_LOG_EVT_QPLL0_LOCK</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL0 lock. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa9730d0f429cc284bf9239c464962514f"></a>XHDMIPHY1_LOG_EVT_QPLL0_RECONFIG</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL0 reconfig. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fad12d4e763346f6f277aaaeee968f9b1b"></a>XHDMIPHY1_LOG_EVT_QPLL1_EN</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL1 enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa8f6ebe550852ace5dcb397e0e92e7de5"></a>XHDMIPHY1_LOG_EVT_QPLL1_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL1 reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa99870e5fedc372c2161de8f595976c89"></a>XHDMIPHY1_LOG_EVT_QPLL1_LOCK</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL1 lock. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa4d242a87ab686b95bf2ce14ca72001e8"></a>XHDMIPHY1_LOG_EVT_QPLL1_RECONFIG</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL1 reconfig. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa7a74c2aff0510429874c8467fbfa720b"></a>XHDMIPHY1_LOG_EVT_PLL0_EN</em>&nbsp;</td><td class="fielddoc">
<p>Log event PLL0 reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fabb0430d0b85286e505c0f956279edd68"></a>XHDMIPHY1_LOG_EVT_PLL0_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event PLL0 reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fab13829acbd775009fcc1f01514a9fe91"></a>XHDMIPHY1_LOG_EVT_PLL1_EN</em>&nbsp;</td><td class="fielddoc">
<p>Log event PLL1 reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fad9ca01949d854ce10d3bc43a5ca215a8"></a>XHDMIPHY1_LOG_EVT_PLL1_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event PLL1 reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa6291555f8d5842b49cc85b1992b93171"></a>XHDMIPHY1_LOG_EVT_CPLL_EN</em>&nbsp;</td><td class="fielddoc">
<p>Log event CPLL reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa84d8493337faf9af93ce135edca252ae"></a>XHDMIPHY1_LOG_EVT_CPLL_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event CPLL reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fadb7701b9317cdb208995d002892d0eac"></a>XHDMIPHY1_LOG_EVT_CPLL_LOCK</em>&nbsp;</td><td class="fielddoc">
<p>Log event CPLL lock. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fafe46d81b98d1f454e167f1850d51e73c"></a>XHDMIPHY1_LOG_EVT_CPLL_RECONFIG</em>&nbsp;</td><td class="fielddoc">
<p>Log event CPLL reconfig. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa8579679c6be1018462759ab6d24f694a"></a>XHDMIPHY1_LOG_EVT_LCPLL_LOCK</em>&nbsp;</td><td class="fielddoc">
<p>Log event LCPLL lock. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa88ab82faf45e848827696960f46af78b"></a>XHDMIPHY1_LOG_EVT_RPLL_LOCK</em>&nbsp;</td><td class="fielddoc">
<p>Log event RPLL lock. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fab85fcce757da0b66c9944fa7f7d75eef"></a>XHDMIPHY1_LOG_EVT_TXPLL_EN</em>&nbsp;</td><td class="fielddoc">
<p>Log event TXPLL enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8faed656efbf8d1665cc583db964226960a"></a>XHDMIPHY1_LOG_EVT_TXPLL_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event TXPLL reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fab005d48a1421a996107763e25a79ed6a"></a>XHDMIPHY1_LOG_EVT_RXPLL_EN</em>&nbsp;</td><td class="fielddoc">
<p>Log event RXPLL enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa34f1adc5b5220146133d12c5c673c466"></a>XHDMIPHY1_LOG_EVT_RXPLL_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event RXPLL reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fab48a003daba5c49c31327d31a7344fdb"></a>XHDMIPHY1_LOG_EVT_GTRX_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event GT RX reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fae3b7e5bdbde62c0539b69660ff718a2f"></a>XHDMIPHY1_LOG_EVT_GTTX_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event GT TX reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa6ba098981c6f7e8717ab0b3d166facdc"></a>XHDMIPHY1_LOG_EVT_VID_TX_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event Vid TX reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa3dbbacab895e2f48455597b95f20d3e6"></a>XHDMIPHY1_LOG_EVT_VID_RX_RST</em>&nbsp;</td><td class="fielddoc">
<p>Log event Vid RX reset. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa4977e4ce8c8d2017bbc96f3675325b99"></a>XHDMIPHY1_LOG_EVT_TX_ALIGN</em>&nbsp;</td><td class="fielddoc">
<p>Log event TX align. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8faac936f6bc91762d6621757e29b471994"></a>XHDMIPHY1_LOG_EVT_TX_ALIGN_TMOUT</em>&nbsp;</td><td class="fielddoc">
<p>Log event TX align Timeout. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fafed065faee2d08d40b502fff4c292445"></a>XHDMIPHY1_LOG_EVT_TX_TMR</em>&nbsp;</td><td class="fielddoc">
<p>Log event TX timer. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8faf2277760e6b71229d82ecf73f95201da"></a>XHDMIPHY1_LOG_EVT_RX_TMR</em>&nbsp;</td><td class="fielddoc">
<p>Log event RX timer. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fab037d8fe4e7d9efa115f91602c0e19d5"></a>XHDMIPHY1_LOG_EVT_GT_RECONFIG</em>&nbsp;</td><td class="fielddoc">
<p>Log event GT reconfig. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fac9bbc691736d2c3f8ecf4456e98b7b18"></a>XHDMIPHY1_LOG_EVT_GT_TX_RECONFIG</em>&nbsp;</td><td class="fielddoc">
<p>Log event GT reconfig. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa1950033e842d74ae93cf70842b6f9f03"></a>XHDMIPHY1_LOG_EVT_GT_RX_RECONFIG</em>&nbsp;</td><td class="fielddoc">
<p>Log event GT reconfig. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8faec83e85f882616806c051d6280541031"></a>XHDMIPHY1_LOG_EVT_INIT</em>&nbsp;</td><td class="fielddoc">
<p>Log event init. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8facd89910057776a6a302595c1e6aaf263"></a>XHDMIPHY1_LOG_EVT_TXPLL_RECONFIG</em>&nbsp;</td><td class="fielddoc">
<p>Log event TXPLL reconfig. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8faf0cd31f3544b0433a61a07313f7306c4"></a>XHDMIPHY1_LOG_EVT_RXPLL_RECONFIG</em>&nbsp;</td><td class="fielddoc">
<p>Log event RXPLL reconfig. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa56be305ac94b4fde45ed7f96f2f60416"></a>XHDMIPHY1_LOG_EVT_RXPLL_LOCK</em>&nbsp;</td><td class="fielddoc">
<p>Log event RXPLL lock. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8faecedb4454e45d609203050d25fb628a9"></a>XHDMIPHY1_LOG_EVT_TXPLL_LOCK</em>&nbsp;</td><td class="fielddoc">
<p>Log event TXPLL lock. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8faf1558ff041531923de26d2cdf21faeb5"></a>XHDMIPHY1_LOG_EVT_TX_RST_DONE</em>&nbsp;</td><td class="fielddoc">
<p>Log event TX reset done. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa07750319efaea19cbec4aa97eab21bee"></a>XHDMIPHY1_LOG_EVT_RX_RST_DONE</em>&nbsp;</td><td class="fielddoc">
<p>Log event RX reset done. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa8e08806e0035981f0aeac11963e9b29d"></a>XHDMIPHY1_LOG_EVT_TX_FREQ</em>&nbsp;</td><td class="fielddoc">
<p>Log event TX frequency. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa7e97df6b0482956381f42935d4088413"></a>XHDMIPHY1_LOG_EVT_RX_FREQ</em>&nbsp;</td><td class="fielddoc">
<p>Log event RX frequency. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa9bd193450a0b8149982ea2bd8e4b334b"></a>XHDMIPHY1_LOG_EVT_DRU_EN</em>&nbsp;</td><td class="fielddoc">
<p>Log event DRU enable/disable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fad1249231d3dd37dc9b246750de6c468a"></a>XHDMIPHY1_LOG_EVT_TXGPO_RE</em>&nbsp;</td><td class="fielddoc">
<p>Log event TX GPO Rising Edge. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fab5aab4974e5d695941267b02c063b6bf"></a>XHDMIPHY1_LOG_EVT_RXGPO_RE</em>&nbsp;</td><td class="fielddoc">
<p>Log event RX GPO Rising Edge. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fae974e310d8245fa9285d8a3d460c6701"></a>XHDMIPHY1_LOG_EVT_FRL_RECONFIG</em>&nbsp;</td><td class="fielddoc">
<p>Log event FRL TX Reconfig. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa924af29f57a82f33882dce6c2de2215b"></a>XHDMIPHY1_LOG_EVT_TMDS_RECONFIG</em>&nbsp;</td><td class="fielddoc">
<p>Log event TMDS TX Reconfig. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa737d1a41d1b1a576101bd574080f08d1"></a>XHDMIPHY1_LOG_EVT_1PPC_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log event 1 PPC Error. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa618c0fbfd33c119da0e2b28cf514972d"></a>XHDMIPHY1_LOG_EVT_PPC_MSMTCH_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log event PPC MismatchError. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fab28d0791b29cf76ead1a21aef864e70c"></a>XHDMIPHY1_LOG_EVT_VDCLK_HIGH_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log evt VidClk &gt; 148.5 MHz. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fad34e90440aa943deb81d65f994e7272b"></a>XHDMIPHY1_LOG_EVT_NO_DRU</em>&nbsp;</td><td class="fielddoc">
<p>Log evt Vid not supported no DRU. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fac16c7e8601244f595cd804fe75df142b"></a>XHDMIPHY1_LOG_EVT_GT_QPLL_CFG_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL Config not found. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa1591a806934dc21fa2368d022cd0f12d"></a>XHDMIPHY1_LOG_EVT_GT_CPLL_CFG_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log evt LCPLL Config not found. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa4f69c113ecd57c23854146858f0c9269"></a>XHDMIPHY1_LOG_EVT_GT_LCPLL_CFG_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log evt RPLL Config not found. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa31b63c120656778e61b40ac16e914019"></a>XHDMIPHY1_LOG_EVT_GT_RPLL_CFG_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL Config not found. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa1c67cc48ccc5a88ac43e15fe694879b6"></a>XHDMIPHY1_LOG_EVT_VD_NOT_SPRTD_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log evt Vid fmt not supported. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fae623db986f9d02253c3ccbec9f5c6963"></a>XHDMIPHY1_LOG_EVT_MMCM_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log event MMCM Config not found. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa53ab59ff98e6c0f14d01b573c1adb9ad"></a>XHDMIPHY1_LOG_EVT_HDMI20_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log event HDMI2.0 not supported. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fab955fbee9a933ef6bbebf9d04a8ad1db"></a>XHDMIPHY1_LOG_EVT_NO_QPLL_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log event QPLL not present. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa16d87e8ac61927ee62d631af02a55eea"></a>XHDMIPHY1_LOG_EVT_DRU_CLK_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log event DRU clk wrong freq. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fabf63790d5f5a16fdfbbd3c5d2680fa29"></a>XHDMIPHY1_LOG_EVT_USRCLK_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log event usrclk &gt; 297 MHz. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fa087c065913419984d661cf0488fe3e7e"></a>XHDMIPHY1_LOG_EVT_SPDGRDE_ERR</em>&nbsp;</td><td class="fielddoc">
<p>Log event Speed Grade -1 error. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga507763f75897762cabf8819fde24ab8fac5e344d7d6b6232fbba3fa5698de8532"></a>XHDMIPHY1_LOG_EVT_DUMMY</em>&nbsp;</td><td class="fielddoc">
<p>Dummy Event should be last. </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="ga1b751875671500e5b0173be954368177"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#ga1b751875671500e5b0173be954368177">XHdmiphy1_OutClkSelType</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This typedef enumerates the available clocks that are used as multiplexer input selections for the RX/TX output clock. </p>

</div>
</div>
<a class="anchor" id="gaec55cf3dfcfa0c7cf9749c63690dd019"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#gaec55cf3dfcfa0c7cf9749c63690dd019">XHdmiphy1_PllRefClkSelType</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This typedef enumerates the available reference clocks for the PLL clock selection multiplexer. </p>

</div>
</div>
<a class="anchor" id="gae8559ee2ca7c404467a72f4653a5d4f5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This typedef enumerates the different PLL types for a given GT channel. </p>

</div>
</div>
<a class="anchor" id="ga3532b332baefc7e9454c8d485aedb4c9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#ga3532b332baefc7e9454c8d485aedb4c9">XHdmiphy1_PrbsPattern</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This typedef enumerates the available PRBS patterns available from the. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga3532b332baefc7e9454c8d485aedb4c9ae0898365a0b18b77ba8aa9ff62ae6cc8"></a>XHDMIPHY1_PRBSSEL_STD_MODE</em>&nbsp;</td><td class="fielddoc">
<p>Pattern gen/mon OFF. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga3532b332baefc7e9454c8d485aedb4c9af6f4f716f17df5edd1159f6ef190beaa"></a>XHDMIPHY1_PRBSSEL_PRBS7</em>&nbsp;</td><td class="fielddoc">
<p>PRBS-7. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga3532b332baefc7e9454c8d485aedb4c9a2b2bcf27a138709fe68eeb64196d905b"></a>XHDMIPHY1_PRBSSEL_PRBS9</em>&nbsp;</td><td class="fielddoc">
<p>PRBS-9. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga3532b332baefc7e9454c8d485aedb4c9a902b603e09315a9fd882d54c5931ead9"></a>XHDMIPHY1_PRBSSEL_PRBS15</em>&nbsp;</td><td class="fielddoc">
<p>PRBS-15. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga3532b332baefc7e9454c8d485aedb4c9a160dcf174e121f49389ebffbcaad1b9d"></a>XHDMIPHY1_PRBSSEL_PRBS23</em>&nbsp;</td><td class="fielddoc">
<p>PRBS-23. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga3532b332baefc7e9454c8d485aedb4c9a6e33841bd8f7289de780ffc2448f34a5"></a>XHDMIPHY1_PRBSSEL_PRBS31</em>&nbsp;</td><td class="fielddoc">
<p>PRBS-31. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga3532b332baefc7e9454c8d485aedb4c9af77b0f4ab5babf65a0564dee707db0a3"></a>XHDMIPHY1_PRBSSEL_PCIE</em>&nbsp;</td><td class="fielddoc">
<p>PCIE Compliance Pattern. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga3532b332baefc7e9454c8d485aedb4c9ad3ac6e5e70273461a0d7dd7b8f354d63"></a>XHDMIPHY1_PRBSSEL_SQUARE_2UI</em>&nbsp;</td><td class="fielddoc">
<p>Square wave with 2 UI. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga3532b332baefc7e9454c8d485aedb4c9ad41202a47ce4ece76aab4ec3fe631a7a"></a>XHDMIPHY1_PRBSSEL_SQUARE_16UI</em>&nbsp;</td><td class="fielddoc">
<p>Square wave with 16 UI. </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="ga3f9002a6b4bc8e47f9c1fa68f8d0fb15"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#ga3f9002a6b4bc8e47f9c1fa68f8d0fb15">XHdmiphy1_ProtocolType</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This typedef enumerates the various protocols handled by the Video PHY controller (HDMIPHY). </p>

</div>
</div>
<a class="anchor" id="ga4d998790546ec3dde5119376868686e6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This typedef enumerates the available reference clocks used to drive the RX/TX datapaths. </p>

</div>
</div>
<a class="anchor" id="gac87909fabb3f765c0be156e7082aea8e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__xhdmiphy1.html#gac87909fabb3f765c0be156e7082aea8e">XHdmiphy1_SysClkOutSelType</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This typedef enumerates the available reference clocks used to drive the RX/TX output clocks. </p>

</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
<a class="anchor" id="gac17db2af38544c85cb299d147fcdac16"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1___config.html">XHdmiphy1_Config</a> *&#160;</td>
          <td class="paramname"><em>ConfigPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function retrieves the configuration for this Video PHY instance and fills in the InstancePtr-&gt;Config structure. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance. </td></tr>
    <tr><td class="paramname">ConfigPtr</td><td>is a pointer to the configuration structure that will be used to copy the settings from. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the device base address in the virtual memory space. If the address translation is not used, then the physical address is passed.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Unexpected errors may occur if the address mapping is changed after this function is invoked. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a2fb109c75352439b0e91bc457b98c110">XHdmiphy1_Config::DruRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1.html#a2410c544d217821ce4e85e391b1c676a">XHdmiphy1::IsReady</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad7df81b4c90d8f4d6ca34a614e7987d2">XHdmiphy1_Config::RxFrlRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#aa5b946a35a56f444442b88bfa49ae1bc">XHdmiphy1_Config::RxRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#aea6c3ccda8a54e9bdaac1730162e4200">XHdmiphy1_Config::RxSysPllClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a41f3855163277fe3afeea97a489e1fd4">XHdmiphy1_Config::TxFrlRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#acad30878325a5832d62b791c22a2091a">XHdmiphy1_Config::TxRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a2e9741628b8a5bb24c2f11e478f44b61">XHdmiphy1_Config::TxSysPllClkSel</a>, and <a class="el" href="struct_x_hdmiphy1___config.html#ad890da2c40e7f26bdc43fcb09473a327">XHdmiphy1_Config::XcvrType</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="ga71a574c5aedf401c9b7c59a173822f8f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_CfgLineRate </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>LineRateHz</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Configure the channel's line rate. </p>
<p>This is a software only configuration and this value is used in the PLL calculator.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">LineRate</td><td>is the line rate to configure software.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the reference clock type is valid.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___channel.html#ab40f4cd71a6a17e5fadfb0e51c96f310">XHdmiphy1_Channel::LineRateHz</a>, <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, and <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>.</p>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi_8c.html#aefc037877ed6316c6995845442a31971">XHdmiphy1_HdmiCpllParam()</a>, and <a class="el" href="xhdmiphy1__hdmi_8c.html#a026bd874ba52e36d8f0e770b962543f9">XHdmiphy1_HdmiQpllParam()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf3cb368774462d22b085a8e34d2c7a00"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_CfgPllRefClkSel </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#gaec55cf3dfcfa0c7cf9749c63690dd019">XHdmiphy1_PllRefClkSelType</a>&#160;</td>
          <td class="paramname"><em>RefClkSel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Configure the PLL reference clock selection for the specified channel(s). </p>
<p>This is applied to both direction to the software configuration only.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">SysClkDataSel</td><td>is the reference clock selection to configure.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, and <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga1e17b8f3099b9edb96bdf732671b7efc">XHdmiphy1_Hdmi20Config()</a>, <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, and <a class="el" href="group__xhdmiphy1.html#ga82f13f4133bdf9ab03d845c8462dc091">XHdmiphy1_PllInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="ga4e6b72ef1579950b4c8c83e35e7ad4b0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_CfgSysClkDataSel </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a>&#160;</td>
          <td class="paramname"><em>SysClkDataSel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Configure the SYSCLKDATA reference clock selection for the direction. </p>
<p>Same configuration applies to all channels in the quad. This is applied to the software configuration only.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">SysClkDataSel</td><td>is the reference clock selection to configure.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, and <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>.</p>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi_8c.html#a026bd874ba52e36d8f0e770b962543f9">XHdmiphy1_HdmiQpllParam()</a>, and <a class="el" href="group__xhdmiphy1.html#ga82f13f4133bdf9ab03d845c8462dc091">XHdmiphy1_PllInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="ga738210e1c11e69176f1cd733ff0bae6c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_CfgSysClkOutSel </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#gac87909fabb3f765c0be156e7082aea8e">XHdmiphy1_SysClkOutSelType</a>&#160;</td>
          <td class="paramname"><em>SysClkOutSel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Configure the SYSCLKOUT reference clock selection for the direction. </p>
<p>Same configuration applies to all channels in the quad. This is applied to the software configuration only.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">SysClkOutSel</td><td>is the reference clock selection to configure.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, and <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>.</p>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi_8c.html#a026bd874ba52e36d8f0e770b962543f9">XHdmiphy1_HdmiQpllParam()</a>, and <a class="el" href="group__xhdmiphy1.html#ga82f13f4133bdf9ab03d845c8462dc091">XHdmiphy1_PllInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="ga70ecb3c5614ea8c97c0bc56bd395ac2c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_Ch2Ids </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>Id0</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>Id1</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will set the channel IDs to correspond with the supplied channel ID based on the protocol. </p>
<p>HDMI uses 3 channels; This ID translation is done to allow other functions to operate iteratively over multiple channels.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID used to determine the indices. </td></tr>
    <tr><td class="paramname">Id0</td><td>is a pointer to the start channel ID to set. </td></tr>
    <tr><td class="paramname">Id1</td><td>is a pointer to the end channel ID to set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The contents of Id0 and Id1 will be set according to ChId. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___config.html#af477236d1bfcdcf060a5d2bb64e46d8f">XHdmiphy1_Config::RxChannels</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ac740909a82f7887fbb3b27bf25aeb99d">XHdmiphy1_Config::RxProtocol</a>, <a class="el" href="struct_x_hdmiphy1___config.html#abed1d8f66f62de3bf785f81d0acbfd63">XHdmiphy1_Config::TxChannels</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a9daac9ee0c1db4441707eb89d83e69f7">XHdmiphy1_Config::TxProtocol</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ab8a671320487b659cd238148c8c2895f">XHdmiphy1_Config::UseGtAsTxTmdsClk</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad890da2c40e7f26bdc43fcb09473a327">XHdmiphy1_Config::XcvrType</a>, and <a class="el" href="group__xhdmiphy1.html#gab75f3892f884d01f855d607291eba269">XHdmiphy1_IsHDMI()</a>.</p>

</div>
</div>
<a class="anchor" id="gad8f3d6250fe7c2d7384a5f20507da509"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_ClkCalcParams </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>PllClkInFreqHz</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will try to find the necessary PLL divisor values to produce the configured line rate given the specified PLL input frequency. </p>
<p>This will be done for all channels specified by ChId. This function is a wrapper for XHdmiphy1_PllCalculator.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to calculate the PLL values for. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to calculate the PLL values for. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">PllClkInFreqHz</td><td>is the PLL input frequency on which to base the calculations on. A value of 0 indicates to use the currently configured quad PLL reference clock. A non-zero value indicates to ignore what is currently configured in SW, and use a custom frequency instead.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if valid PLL values were found to satisfy the constraints.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If successful, the channel's PllParams structure will be modified with the valid PLL parameters. </dd></dl>

<p>References <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, and <a class="el" href="group__xhdmiphy1.html#ga87f9523a81f1b648cfae0172bdd96f0b">XHdmiphy1_PllCalculator()</a>.</p>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi_8c.html#aefc037877ed6316c6995845442a31971">XHdmiphy1_HdmiCpllParam()</a>, and <a class="el" href="xhdmiphy1__hdmi_8c.html#a026bd874ba52e36d8f0e770b962543f9">XHdmiphy1_HdmiQpllParam()</a>.</p>

</div>
</div>
<a class="anchor" id="gaa113dd9ce96c346ef9b757947eb340fe"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_ClkDetAccuracyRange </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>ThresholdVal</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the clock detector accuracy range value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">ThresholdVal</td><td>is the threshold value to be set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gafaece55136a95db26cf37edcd53c96f8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u8 XHdmiphy1_ClkDetCheckFreqZero </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function checks clock detector RX/TX frequency zero indicator bit. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for RX or TX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>- TRUE if zero frequency.<ul>
<li>FALSE otherwise, if non-zero frequency.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="gab2369998b0e4635bced93881e51cc8fe"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_ClkDetEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables the HDMIPHY's detector peripheral. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">Enable</td><td>specifies TRUE/FALSE value to either enable or disable the clock detector respectively.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gac39e0926826a1e127514c8350ddcde21"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_ClkDetFreqReset </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function resets clock detector TX/RX frequency. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for RX or TX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="gabb75647ab6dfd99febccba18593e86d8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_ClkDetGetRefClkFreqHz </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function returns the frequency of the RX/TX reference clock as measured by the clock detector peripheral. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for RX or TX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The measured frequency of the RX/TX reference clock.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___hdmi21_cfg.html#aa0dc355514f68382f6bfaced2f6e979b">XHdmiphy1_Hdmi21Cfg::IsEnabled</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad7df81b4c90d8f4d6ca34a614e7987d2">XHdmiphy1_Config::RxFrlRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1.html#a44a9b24f205fee3e03f3724a89abf2bb">XHdmiphy1::RxHdmi21Cfg</a>, <a class="el" href="struct_x_hdmiphy1___config.html#aa5b946a35a56f444442b88bfa49ae1bc">XHdmiphy1_Config::RxRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a41f3855163277fe3afeea97a489e1fd4">XHdmiphy1_Config::TxFrlRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1.html#ac60ed4c71a5adcb71a99edad2997e24c">XHdmiphy1::TxHdmi21Cfg</a>, <a class="el" href="struct_x_hdmiphy1___config.html#acad30878325a5832d62b791c22a2091a">XHdmiphy1_Config::TxRefClkSel</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga4c7a948926fede8a6548c6cffe5fc830">XHdmiphy1_DruCalcCenterFreqHz()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>, and <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#afc3e2c76a28022e9d12a96990cc2fc83">XHdmiphy1_HdmiTxClkDetFreqChangeHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga5a055146c6b3aa1da1991a0041dc11f7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_ClkDetSetFreqLockThreshold </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>ThresholdVal</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the clock detector frequency lock counter threshold value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">ThresholdVal</td><td>is the threshold value to be set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="ga46cb7e8a6cc10a61bbfb7126f85e8cec"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_ClkDetSetFreqTimeout </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>TimeoutVal</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets clock detector frequency lock counter threshold value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">TimeoutVal</td><td>is the timeout value and is normally the system clock frequency.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gac2f877b2581399c3344d1555d05df2df"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_ClkDetTimerClear </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function clears the clock detector TX/RX timer. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for RX or TX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>, and <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#afc3e2c76a28022e9d12a96990cc2fc83">XHdmiphy1_HdmiTxClkDetFreqChangeHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gacbffa1bd1304f2f69a32aa1a22573052"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_ClkDetTimerLoad </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>TimeoutVal</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function loads the timer to TX/RX in the clock detector. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for RX or TX. </td></tr>
    <tr><td class="paramname">TimeoutVal</td><td>is the timeout value to store in the clock detector.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>, and <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#afc3e2c76a28022e9d12a96990cc2fc83">XHdmiphy1_HdmiTxClkDetFreqChangeHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gab511031505e9679f2bd243d68eb725f4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_Clkout1OBufTdsEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables the TX or RX CLKOUT1 OBUFTDS peripheral. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Enable</td><td>specifies TRUE/FALSE value to either enable or disable the OBUFTDS, respectively.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>.</p>

</div>
</div>
<a class="anchor" id="gaeb31d823a71bad5b0bb6250b016577d7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_ClkReconfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will set the current clocking settings for each channel to hardware based on the configuration stored in the driver's instance. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID for which to write the settings for.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the configuration was successful.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a7db1a3f7a4d313d9d8d279036680a7bb">XHdmiphy1::HdmiIsQpllPresent</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#ga3fc9cb2326efad44689d4af163343b7f">XHdmiphy1_ErrorHandler()</a>, <a class="el" href="group__xhdmiphy1.html#gab75f3892f884d01f855d607291eba269">XHdmiphy1_IsHDMI()</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fafe46d81b98d1f454e167f1850d51e73c">XHDMIPHY1_LOG_EVT_CPLL_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab955fbee9a933ef6bbebf9d04a8ad1db">XHDMIPHY1_LOG_EVT_NO_QPLL_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fad1a525f5335b7c7814e19fc19e8dee78">XHDMIPHY1_LOG_EVT_QPLL_RECONFIG</a>, and <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, and <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gacfaf4756f5682dfda2739a8083deea56"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_DirReconfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will set the current RX/TX configuration over DRP. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID for which to write the settings for. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for RX or TX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the configuration was successful.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa1950033e842d74ae93cf70842b6f9f03">XHDMIPHY1_LOG_EVT_GT_RX_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fac9bbc691736d2c3f8ecf4456e98b7b18">XHDMIPHY1_LOG_EVT_GT_TX_RECONFIG</a>, and <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, and <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga55c5c6061828e1f986b64d4c0ae9a57b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u16 XHdmiphy1_DrpRd </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Addr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16 *&#160;</td>
          <td class="paramname"><em>RetVal</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will initiate a read DRP transaction. </p>
<p>It is a wrapper around XHdmiphy1_DrpAccess.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID on which to direct the DRP access. </td></tr>
    <tr><td class="paramname">Addr</td><td>is the DRP address to issue the DRP access to. </td></tr>
    <tr><td class="paramname">RetVal</td><td>is the DRP read_value returned implicitly.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the DRP access was successful.</li>
<li>XST_FAILURE otherwise, if the busy bit did not go low, or if the ready bit did not go high.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga8dc19df05e15d413e62ff62d2c22c023">XHdmiphy1_RegisterDebug()</a>.</p>

</div>
</div>
<a class="anchor" id="ga632197e5f773491cdf96f076e7112e0f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_DrpWr </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Addr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Val</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will initiate a write DRP transaction. </p>
<p>It is a wrapper around XHdmiphy1_DrpAccess.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID on which to direct the DRP access. </td></tr>
    <tr><td class="paramname">Addr</td><td>is the DRP address to issue the DRP access to. </td></tr>
    <tr><td class="paramname">Val</td><td>is the value to write to the DRP address.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the DRP access was successful.</li>
<li>XST_FAILURE otherwise, if the busy bit did not go low, or if the ready bit did not go high.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

</div>
</div>
<a class="anchor" id="ga4c7a948926fede8a6548c6cffe5fc830"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u64 XHdmiphy1_DruCalcCenterFreqHz </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function calculates the center frequency value for the DRU. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> GT core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The calculated DRU Center frequency value.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>According to XAPP1240: Center_f = fDIN * (2^32)/fdruclk The DRU clock is derived from the measured reference clock and the current QPLL settings. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a67bd659e6e97f698cdca013741601d2a">XHdmiphy1_Channel::RxOutDiv</a>, <a class="el" href="group__xhdmiphy1.html#gabb75647ab6dfd99febccba18593e86d8">XHdmiphy1_ClkDetGetRefClkFreqHz()</a>, and <a class="el" href="group__xhdmiphy1.html#gae2d190888890d12b1524b5d5065e5e57">XHdmiphy1_DruGetRefClkFreqHz()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga2bf27809a22eecc5194a8bad16261280">XHdmiphy1_SetHdmiRxParam()</a>.</p>

</div>
</div>
<a class="anchor" id="ga7b7a69d580eaac17960b977851aead25"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_DruEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enabled/disables the DRU in the HDMIPHY. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">Enable</td><td>specifies TRUE/FALSE value to either enable or disable the DRU, respectively.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>, and <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gae2d190888890d12b1524b5d5065e5e57"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_DruGetRefClkFreqHz </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function returns the frequency of the DRU reference clock as measured by the clock detector peripheral. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The measured frequency of the DRU reference clock.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The design must have a DRU for this function to return a valid value. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1.html#a834817daba49b8bd130bd52fbb911f41">XHdmiphy1::versal_2ve_2vm</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad890da2c40e7f26bdc43fcb09473a327">XHdmiphy1_Config::XcvrType</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga4c7a948926fede8a6548c6cffe5fc830">XHdmiphy1_DruCalcCenterFreqHz()</a>, <a class="el" href="group__xhdmiphy1.html#ga7cd4d4f88631190ea51009300a15b783">XHdmiphy1_GetPllVcoFreqHz()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#aefc037877ed6316c6995845442a31971">XHdmiphy1_HdmiCpllParam()</a>, and <a class="el" href="xhdmiphy1__hdmi_8c.html#a026bd874ba52e36d8f0e770b962543f9">XHdmiphy1_HdmiQpllParam()</a>.</p>

</div>
</div>
<a class="anchor" id="gab5da59924fa5189f7141d950e6d31a50"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u16 XHdmiphy1_DruGetVersion </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function gets the DRU version. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga16dfea31e43d9da2c4c00cd0785b6248">XHdmiphy1_HdmiDebugInfo()</a>.</p>

</div>
</div>
<a class="anchor" id="ga5ccf265013fcb1e013775dc9a8563c87"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_DruReset </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Reset</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function resets the DRU in the HDMIPHY. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">Reset</td><td>specifies TRUE/FALSE value to either enable or disable the DRU respectively.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a0c603299dc1bafabcf0ecfe920bd412b">XHdmiphy1_HdmiGtRxResetDoneLockHandler()</a>, and <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga02899710d93b44ffa5d6f87637d67809"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_DruSetCenterFreqHz </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>CenterFreqHz</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the DRU center frequency. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">ChId</td><td>specifies the channel ID. </td></tr>
    <tr><td class="paramname">CenterFreqHz</td><td>is the frequency value to set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga2bf27809a22eecc5194a8bad16261280">XHdmiphy1_SetHdmiRxParam()</a>.</p>

</div>
</div>
<a class="anchor" id="ga3fc9cb2326efad44689d4af163343b7f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_ErrorHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function is the error condition handler. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HDMIPHY instance. </td></tr>
    <tr><td class="paramname">ErrIrqType</td><td>is the error type</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a9a1e64dac33e66a6aa4f174f91b8e399">XHdmiphy1::ErrorCallback</a>, and <a class="el" href="struct_x_hdmiphy1.html#a43d930ddd0de54af43270cac39e01ee6">XHdmiphy1::ErrorRef</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaeb31d823a71bad5b0bb6250b016577d7">XHdmiphy1_ClkReconfig()</a>, <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>, <a class="el" href="group__xhdmiphy1.html#gafa361514e8315c25876867a1ded2c99b">XHdmiphy1_HdmiCfgCalcMmcmParam()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#aefc037877ed6316c6995845442a31971">XHdmiphy1_HdmiCpllParam()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a026bd874ba52e36d8f0e770b962543f9">XHdmiphy1_HdmiQpllParam()</a>, and <a class="el" href="group__xhdmiphy1.html#ga69e679f0c4444350910817be69cde77c">XHdmiphy1_SetHdmiTxParam()</a>.</p>

</div>
</div>
<a class="anchor" id="ga31263f99c22623f852ea864fba080232"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u64 XHdmiphy1_GetLineRateHz </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will return the line rate in Hz for a given channel / quad. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to check. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID for which to retrieve the line rate.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The line rate in Hz.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___channel.html#ab40f4cd71a6a17e5fadfb0e51c96f310">XHdmiphy1_Channel::LineRateHz</a>, and <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>.</p>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi_8c.html#aefc037877ed6316c6995845442a31971">XHdmiphy1_HdmiCpllParam()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#ad65db64a87467172db631b182c2ddd2d">XHdmiphy1_HdmiGtTxResetDoneLockHandler()</a>, and <a class="el" href="xhdmiphy1__hdmi_8c.html#a026bd874ba52e36d8f0e770b962543f9">XHdmiphy1_HdmiQpllParam()</a>.</p>

</div>
</div>
<a class="anchor" id="ga97e1d4070dafe5a73d9bf60621382c98"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a> XHdmiphy1_GetPllType </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Obtain the channel's PLL reference clock selection. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID which to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The PLL type being used by the channel.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___config.html#aea6c3ccda8a54e9bdaac1730162e4200">XHdmiphy1_Config::RxSysPllClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a2e9741628b8a5bb24c2f11e478f44b61">XHdmiphy1_Config::TxSysPllClkSel</a>, <a class="el" href="group__xhdmiphy1.html#gaa91560e5b99db9d90042b548a76da7a6">XHdmiphy1_GetSysClkDataSel()</a>, and <a class="el" href="group__xhdmiphy1.html#gabf0e7c8a542401ba275640fabee19940">XHdmiphy1_GetSysClkOutSel()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga1e17b8f3099b9edb96bdf732671b7efc">XHdmiphy1_Hdmi20Config()</a>, <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>, <a class="el" href="group__xhdmiphy1.html#gafa361514e8315c25876867a1ded2c99b">XHdmiphy1_HdmiCfgCalcMmcmParam()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#acc32a98d0cf6cf638c3fe4e3fe057226">XHdmiphy1_HdmiCpllLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#ad65db64a87467172db631b182c2ddd2d">XHdmiphy1_HdmiGtTxResetDoneLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a0dadbdee261d92500f5c3a5f55b76218">XHdmiphy1_HdmiQpllLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#afc3e2c76a28022e9d12a96990cc2fc83">XHdmiphy1_HdmiTxClkDetFreqChangeHandler()</a>, <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>, <a class="el" href="group__xhdmiphy1.html#gac05b90ab984e726f1ddde5cf265915d9">XHdmiphy1_IsPllLocked()</a>, and <a class="el" href="group__xhdmiphy1.html#ga2bf27809a22eecc5194a8bad16261280">XHdmiphy1_SetHdmiRxParam()</a>.</p>

</div>
</div>
<a class="anchor" id="ga7cd4d4f88631190ea51009300a15b783"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u64 XHdmiphy1_GetPllVcoFreqHz </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function calculates the PLL VCO operating frequency. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>PLL VCO frequency in Hz</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a247ba8ff835a604c754d34ab3ba0450c">XHdmiphy1::HdmiRxDruIsEnabled</a>, <a class="el" href="struct_x_hdmiphy1.html#a9ba8d9489de84bdfb6acc4d33c7957ea">XHdmiphy1::HdmiRxRefClkHz</a>, <a class="el" href="struct_x_hdmiphy1.html#a834eecec514b7571575a3bf47cfa63e0">XHdmiphy1::HdmiTxRefClkHz</a>, <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, <a class="el" href="group__xhdmiphy1.html#gae2d190888890d12b1524b5d5065e5e57">XHdmiphy1_DruGetRefClkFreqHz()</a>, <a class="el" href="group__xhdmiphy1.html#gaaa8cf29813f43a1066492adea335bf48">XHdmiphy1_GetQuadRefClkFreq()</a>, and <a class="el" href="group__xhdmiphy1.html#gab75f3892f884d01f855d607291eba269">XHdmiphy1_IsHDMI()</a>.</p>

</div>
</div>
<a class="anchor" id="gaaa8cf29813f43a1066492adea335bf48"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_GetQuadRefClkFreq </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#gaec55cf3dfcfa0c7cf9749c63690dd019">XHdmiphy1_PllRefClkSelType</a>&#160;</td>
          <td class="paramname"><em>RefClkType</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Obtain the current reference clock frequency for the quad based on the reference clock type. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">RefClkType</td><td>is the type to obtain the clock selection for.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The current reference clock frequency for the quad for the specified type selection.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga7cd4d4f88631190ea51009300a15b783">XHdmiphy1_GetPllVcoFreqHz()</a>, and <a class="el" href="group__xhdmiphy1.html#ga87f9523a81f1b648cfae0172bdd96f0b">XHdmiphy1_PllCalculator()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf524ddfb56aa7742cf9c7fc777a2273a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a> XHdmiphy1_GetRcfgChId </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a>&#160;</td>
          <td class="paramname"><em>PllType</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Obtain the reconfiguration channel ID for given PLL type. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">PllType</td><td>is the PLL type being used by the channel.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The Channel ID to be used for reconfiguration</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#acc32a98d0cf6cf638c3fe4e3fe057226">XHdmiphy1_HdmiCpllLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#ad65db64a87467172db631b182c2ddd2d">XHdmiphy1_HdmiGtTxResetDoneLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a0dadbdee261d92500f5c3a5f55b76218">XHdmiphy1_HdmiQpllLockHandler()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>, and <a class="el" href="group__xhdmiphy1.html#ga2bf27809a22eecc5194a8bad16261280">XHdmiphy1_SetHdmiRxParam()</a>.</p>

</div>
</div>
<a class="anchor" id="ga22de3338657208e2ee991d68f0248195"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u8 XHdmiphy1_GetRefClkSourcesCount </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function returns the number of active reference clock sources based in the CFG. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>No of active REFCLK sources</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ac28bbc6cb3c52b7dfc77813be0af0be5">XHdmiphy1_Config::DruIsPresent</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a2fb109c75352439b0e91bc457b98c110">XHdmiphy1_Config::DruRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad7df81b4c90d8f4d6ca34a614e7987d2">XHdmiphy1_Config::RxFrlRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ac740909a82f7887fbb3b27bf25aeb99d">XHdmiphy1_Config::RxProtocol</a>, <a class="el" href="struct_x_hdmiphy1___config.html#aa5b946a35a56f444442b88bfa49ae1bc">XHdmiphy1_Config::RxRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a41f3855163277fe3afeea97a489e1fd4">XHdmiphy1_Config::TxFrlRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a9daac9ee0c1db4441707eb89d83e69f7">XHdmiphy1_Config::TxProtocol</a>, and <a class="el" href="struct_x_hdmiphy1___config.html#acad30878325a5832d62b791c22a2091a">XHdmiphy1_Config::TxRefClkSel</a>.</p>

</div>
</div>
<a class="anchor" id="gaa91560e5b99db9d90042b548a76da7a6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a> XHdmiphy1_GetSysClkDataSel </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Obtain the current [RT]XSYSCLKSEL[0] configuration. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID which to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The current [RT]XSYSCLKSEL[0] selection.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad890da2c40e7f26bdc43fcb09473a327">XHdmiphy1_Config::XcvrType</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga97e1d4070dafe5a73d9bf60621382c98">XHdmiphy1_GetPllType()</a>.</p>

</div>
</div>
<a class="anchor" id="gabf0e7c8a542401ba275640fabee19940"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="group__xhdmiphy1.html#gac87909fabb3f765c0be156e7082aea8e">XHdmiphy1_SysClkOutSelType</a> XHdmiphy1_GetSysClkOutSel </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Obtain the current [RT]XSYSCLKSEL[1] configuration. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID which to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The current [RT]XSYSCLKSEL[1] selection.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad890da2c40e7f26bdc43fcb09473a327">XHdmiphy1_Config::XcvrType</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga97e1d4070dafe5a73d9bf60621382c98">XHdmiphy1_GetPllType()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf6a4e05c5b6141f00bdfa2ae1f30b15a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_GetVersion </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will obtian the IP version. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The IP version of the Video PHY core.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="gaff834a7a15854c09af35144299a4f980"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_GtUserRdyEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Hold</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will reset and enable the Video PHY's user core logic. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID which to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Hold</td><td>is an indicator whether to "hold" the reset if set to 1. If set to 0: reset, then enable.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga1e17b8f3099b9edb96bdf732671b7efc"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_Hdmi20Config </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will configure the HDMIPHY to HDMI 2.0 mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the Hdmiphy core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for RX or TX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if TX parameters set/updated.</li>
<li>XST_FAILURE if low resolution video not supported.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___hdmi21_cfg.html#aa0dc355514f68382f6bfaced2f6e979b">XHdmiphy1_Hdmi21Cfg::IsEnabled</a>, <a class="el" href="struct_x_hdmiphy1___hdmi21_cfg.html#a724279f7463626815c9b4abf031a1bca">XHdmiphy1_Hdmi21Cfg::LineRate</a>, <a class="el" href="struct_x_hdmiphy1___hdmi21_cfg.html#a04a6bd81ffca3e97def17f614f86f985">XHdmiphy1_Hdmi21Cfg::NChannels</a>, <a class="el" href="struct_x_hdmiphy1.html#a44a9b24f205fee3e03f3724a89abf2bb">XHdmiphy1::RxHdmi21Cfg</a>, <a class="el" href="struct_x_hdmiphy1___config.html#aa5b946a35a56f444442b88bfa49ae1bc">XHdmiphy1_Config::RxRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1.html#ac60ed4c71a5adcb71a99edad2997e24c">XHdmiphy1::TxHdmi21Cfg</a>, <a class="el" href="struct_x_hdmiphy1___config.html#acad30878325a5832d62b791c22a2091a">XHdmiphy1_Config::TxRefClkSel</a>, <a class="el" href="group__xhdmiphy1.html#gaf3cb368774462d22b085a8e34d2c7a00">XHdmiphy1_CfgPllRefClkSel()</a>, <a class="el" href="group__xhdmiphy1.html#ga97e1d4070dafe5a73d9bf60621382c98">XHdmiphy1_GetPllType()</a>, <a class="el" href="group__xhdmiphy1.html#gaf1923a89392fcc152f571818d2ad564f">XHdmiphy1_IntrEnable()</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa924af29f57a82f33882dce6c2de2215b">XHDMIPHY1_LOG_EVT_TMDS_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>, <a class="el" href="group__xhdmiphy1.html#ga2b93ca125219d62f19817168267ddfc5">XHdmiphy1_MmcmSetClkinsel()</a>, and <a class="el" href="group__xhdmiphy1.html#ga0fa2836b8aac17e187bf1e01a462001a">XHdmiphy1_WriteCfgRefClkSelReg()</a>.</p>

</div>
</div>
<a class="anchor" id="ga2aa401218d0bc4c64c2210f85ccee457"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_Hdmi21Config </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>LineRate</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>NChannels</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will configure the GT for HDMI 2.1 operation. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the Hdmiphy core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for RX or TX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if TX parameters set/updated.</li>
<li>XST_FAILURE if low resolution video not supported.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1.html#a9ba8d9489de84bdfb6acc4d33c7957ea">XHdmiphy1::HdmiRxRefClkHz</a>, <a class="el" href="struct_x_hdmiphy1.html#a834eecec514b7571575a3bf47cfa63e0">XHdmiphy1::HdmiTxRefClkHz</a>, <a class="el" href="struct_x_hdmiphy1___hdmi21_cfg.html#aa0dc355514f68382f6bfaced2f6e979b">XHdmiphy1_Hdmi21Cfg::IsEnabled</a>, <a class="el" href="struct_x_hdmiphy1___hdmi21_cfg.html#a724279f7463626815c9b4abf031a1bca">XHdmiphy1_Hdmi21Cfg::LineRate</a>, <a class="el" href="struct_x_hdmiphy1___hdmi21_cfg.html#a04a6bd81ffca3e97def17f614f86f985">XHdmiphy1_Hdmi21Cfg::NChannels</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ae1e3334ec7a5182a8bfef0d88503c8b4">XHdmiphy1_Config::Ppc</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad7df81b4c90d8f4d6ca34a614e7987d2">XHdmiphy1_Config::RxFrlRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1.html#a44a9b24f205fee3e03f3724a89abf2bb">XHdmiphy1::RxHdmi21Cfg</a>, <a class="el" href="struct_x_hdmiphy1___config.html#aa5b946a35a56f444442b88bfa49ae1bc">XHdmiphy1_Config::RxRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a41f3855163277fe3afeea97a489e1fd4">XHdmiphy1_Config::TxFrlRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1.html#ac60ed4c71a5adcb71a99edad2997e24c">XHdmiphy1::TxHdmi21Cfg</a>, <a class="el" href="struct_x_hdmiphy1___config.html#acad30878325a5832d62b791c22a2091a">XHdmiphy1_Config::TxRefClkSel</a>, <a class="el" href="group__xhdmiphy1.html#gaf3cb368774462d22b085a8e34d2c7a00">XHdmiphy1_CfgPllRefClkSel()</a>, <a class="el" href="group__xhdmiphy1.html#gab511031505e9679f2bd243d68eb725f4">XHdmiphy1_Clkout1OBufTdsEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga3fc9cb2326efad44689d4af163343b7f">XHdmiphy1_ErrorHandler()</a>, <a class="el" href="group__xhdmiphy1.html#ga97e1d4070dafe5a73d9bf60621382c98">XHdmiphy1_GetPllType()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>, <a class="el" href="group__xhdmiphy1.html#gabb09df5f9b1e2f799160dd944d8ae935">XHdmiphy1_IntrDisable()</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fae974e310d8245fa9285d8a3d460c6701">XHDMIPHY1_LOG_EVT_FRL_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa087c065913419984d661cf0488fe3e7e">XHDMIPHY1_LOG_EVT_SPDGRDE_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>, <a class="el" href="group__xhdmiphy1.html#ga6d652ca1a4650bc5a2762d381a110f6b">XHdmiphy1_MmcmLockedMaskEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga2b93ca125219d62f19817168267ddfc5">XHdmiphy1_MmcmSetClkinsel()</a>, <a class="el" href="group__xhdmiphy1.html#ga5dc7ec503e2e78570719440c12773984">XHdmiphy1_MmcmStart()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a6379077b417b3f435699335235439978">Xhdmiphy1_RefClkValue()</a>, <a class="el" href="group__xhdmiphy1.html#ga69e679f0c4444350910817be69cde77c">XHdmiphy1_SetHdmiTxParam()</a>, and <a class="el" href="group__xhdmiphy1.html#ga0fa2836b8aac17e187bf1e01a462001a">XHdmiphy1_WriteCfgRefClkSelReg()</a>.</p>

</div>
</div>
<a class="anchor" id="gaa15dd35a9b1670aab091738d3ecca9df"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_Hdmi_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1___config.html">XHdmiphy1_Config</a> *&#160;</td>
          <td class="paramname"><em>CfgPtr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function initializes the Video PHY for HDMI. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance. </td></tr>
    <tr><td class="paramname">CfgPtr</td><td>is a pointer to the configuration structure that will be used to copy the settings from.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a58fa36d2bb19fa3f64cc1dd65ae1aa54">XHdmiphy1_Config::AxiLiteClkFreq</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ac28bbc6cb3c52b7dfc77813be0af0be5">XHdmiphy1_Config::DruIsPresent</a>, <a class="el" href="struct_x_hdmiphy1.html#a7db1a3f7a4d313d9d8d279036680a7bb">XHdmiphy1::HdmiIsQpllPresent</a>, <a class="el" href="struct_x_hdmiphy1.html#a2410c544d217821ce4e85e391b1c676a">XHdmiphy1::IsReady</a>, <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a42ccb139aa8c5a38d1b1446f57b9cb5c">XHdmiphy1_Channel::RxState</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad065247f3924daf6806ef1cd334ba877">XHdmiphy1_Config::TransceiverWidth</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a779d9cc95fb049278ff2c9249022f800">XHdmiphy1_Channel::TxState</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad890da2c40e7f26bdc43fcb09473a327">XHdmiphy1_Config::XcvrType</a>, <a class="el" href="group__xhdmiphy1.html#gac17db2af38544c85cb299d147fcdac16">XHdmiphy1_CfgInitialize()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#gaa113dd9ce96c346ef9b757947eb340fe">XHdmiphy1_ClkDetAccuracyRange()</a>, <a class="el" href="group__xhdmiphy1.html#gab2369998b0e4635bced93881e51cc8fe">XHdmiphy1_ClkDetEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a055146c6b3aa1da1991a0041dc11f7">XHdmiphy1_ClkDetSetFreqLockThreshold()</a>, <a class="el" href="group__xhdmiphy1.html#ga46cb7e8a6cc10a61bbfb7126f85e8cec">XHdmiphy1_ClkDetSetFreqTimeout()</a>, <a class="el" href="group__xhdmiphy1.html#ga7b7a69d580eaac17960b977851aead25">XHdmiphy1_DruEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga5ccf265013fcb1e013775dc9a8563c87">XHdmiphy1_DruReset()</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0abb6da8fd6d31dd97dea1910021b0d8f7">XHDMIPHY1_GT_STATE_IDLE</a>, <a class="el" href="group__xhdmiphy1.html#ga1f26c79a098ddb33f610f5a88efc140e">XHdmiphy1_HdmiIntrHandlerCallbackInit()</a>, <a class="el" href="group__xhdmiphy1.html#ga57aac6b723825d9999dc5419d067bda3">XHdmiphy1_IBufDsEnable()</a>, <a class="el" href="group__xhdmiphy1.html#gabb09df5f9b1e2f799160dd944d8ae935">XHdmiphy1_IntrDisable()</a>, <a class="el" href="group__xhdmiphy1.html#gaf1923a89392fcc152f571818d2ad564f">XHdmiphy1_IntrEnable()</a>, <a class="el" href="group__xhdmiphy1.html#gab75f3892f884d01f855d607291eba269">XHdmiphy1_IsHDMI()</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faec83e85f882616806c051d6280541031">XHDMIPHY1_LOG_EVT_INIT</a>, <a class="el" href="group__xhdmiphy1.html#ga67dcfc543f278ca875c99f6dada92520">XHdmiphy1_LogReset()</a>, <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>, <a class="el" href="group__xhdmiphy1.html#ga47707c2203c7788afdfb22fe1ae438db">XHdmiphy1_MmcmReset()</a>, <a class="el" href="group__xhdmiphy1.html#gaf1fbb7de9d26abab7332a62932be9d85">XHdmiphy1_PowerDownGtPll()</a>, <a class="el" href="group__xhdmiphy1.html#ga7f1f22be7f2029c396c015e322475790">XHdmiphy1_ResetGtPll()</a>, <a class="el" href="group__xhdmiphy1.html#gafb115f999643adac66932d6c4a44de1c">XHdmiphy1_SetBufgGtDiv()</a>, <a class="el" href="group__xhdmiphy1.html#ga704b9c7161c4ac92beaa07113caaa36c">XHdmiphy1_SetRxLpm()</a>, <a class="el" href="group__xhdmiphy1.html#ga755a209f0abe848a3508017f83ad4c62">XHdmiphy1_SetTxPostCursor()</a>, <a class="el" href="group__xhdmiphy1.html#gad9dd0d271c9be7416e55adc535257cea">XHdmiphy1_SetTxPreEmphasis()</a>, <a class="el" href="group__xhdmiphy1.html#gaa01b2c0214336ba205fcac3c8fd7675d">XHdmiphy1_SetTxVoltageSwing()</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="gafa361514e8315c25876867a1ded2c99b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_HdmiCfgCalcMmcmParam </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_PixelsPerClock&#160;</td>
          <td class="paramname"><em>Ppc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_ColorDepth&#160;</td>
          <td class="paramname"><em>Bpc</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function calculates the HDMI MMCM parameters. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the Hdmiphy core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for RX or TX. </td></tr>
    <tr><td class="paramname">Ppc</td><td>specifies the total number of pixels per clock.<ul>
<li>1 = XVIDC_PPC_1</li>
<li>2 = XVIDC_PPC_2</li>
<li>4 = XVIDC_PPC_4 </li>
</ul>
</td></tr>
    <tr><td class="paramname">Bpc</td><td>specifies the color depth/bits per color component.<ul>
<li>6 = XVIDC_BPC_6</li>
<li>8 = XVIDC_BPC_8</li>
<li>10 = XVIDC_BPC_10</li>
<li>12 = XVIDC_BPC_12</li>
<li>16 = XVIDC_BPC_16</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if calculated PLL parameters updated successfully.</li>
<li>XST_FAILURE if parameters not updated.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1.html#a9ba8d9489de84bdfb6acc4d33c7957ea">XHdmiphy1::HdmiRxRefClkHz</a>, <a class="el" href="struct_x_hdmiphy1.html#a74efe69af6760d2c3cf8d4d471f5591d">XHdmiphy1::HdmiRxTmdsClockRatio</a>, <a class="el" href="struct_x_hdmiphy1.html#a834eecec514b7571575a3bf47cfa63e0">XHdmiphy1::HdmiTxRefClkHz</a>, <a class="el" href="struct_x_hdmiphy1.html#aa0e3e6f1c5e328af0628bc58d19e915a">XHdmiphy1::HdmiTxSampleRate</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#ab40f4cd71a6a17e5fadfb0e51c96f310">XHdmiphy1_Channel::LineRateHz</a>, <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a20e2ef2834674875c1643c822897ad42">XHdmiphy1_Config::RxClkPrimitive</a>, <a class="el" href="struct_x_hdmiphy1___quad.html#a88cada401818f6a963529acb20cc87c9">XHdmiphy1_Quad::RxMmcm</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad065247f3924daf6806ef1cd334ba877">XHdmiphy1_Config::TransceiverWidth</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a4dc8998eda218c14bd49e0ed7c374657">XHdmiphy1_Config::TxClkPrimitive</a>, <a class="el" href="struct_x_hdmiphy1___quad.html#aa8cde6b8904a6c5dffd5546c23f2c244">XHdmiphy1_Quad::TxMmcm</a>, <a class="el" href="group__xhdmiphy1.html#ga3fc9cb2326efad44689d4af163343b7f">XHdmiphy1_ErrorHandler()</a>, <a class="el" href="group__xhdmiphy1.html#ga97e1d4070dafe5a73d9bf60621382c98">XHdmiphy1_GetPllType()</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa737d1a41d1b1a576101bd574080f08d1">XHDMIPHY1_LOG_EVT_1PPC_ERR</a>, and <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga69e679f0c4444350910817be69cde77c">XHdmiphy1_SetHdmiTxParam()</a>.</p>

</div>
</div>
<a class="anchor" id="ga16dfea31e43d9da2c4c00cd0785b6248"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_HdmiDebugInfo </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function prints Video PHY debug information related to HDMI. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the Hdmiphy core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ac28bbc6cb3c52b7dfc77813be0af0be5">XHdmiphy1_Config::DruIsPresent</a>, <a class="el" href="struct_x_hdmiphy1.html#a247ba8ff835a604c754d34ab3ba0450c">XHdmiphy1::HdmiRxDruIsEnabled</a>, <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a20e2ef2834674875c1643c822897ad42">XHdmiphy1_Config::RxClkPrimitive</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a0f72133d80e15fefd3c0a396370d263e">XHdmiphy1_Channel::RxDataRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___quad.html#a88cada401818f6a963529acb20cc87c9">XHdmiphy1_Quad::RxMmcm</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a67bd659e6e97f698cdca013741601d2a">XHdmiphy1_Channel::RxOutDiv</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a4dc8998eda218c14bd49e0ed7c374657">XHdmiphy1_Config::TxClkPrimitive</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#ab47437f00b7226d61098050f2e222f2e">XHdmiphy1_Channel::TxDataRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___quad.html#aa8cde6b8904a6c5dffd5546c23f2c244">XHdmiphy1_Quad::TxMmcm</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a6791024e367774619bbfeaedb022b6c1">XHdmiphy1_Channel::TxOutDiv</a>, <a class="el" href="group__xhdmiphy1.html#gab5da59924fa5189f7141d950e6d31a50">XHdmiphy1_DruGetVersion()</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0a540efa0ad171c67927e0364e77bf0ab0">XHDMIPHY1_GT_STATE_ALIGN</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0a8237da6c8720d2611ec2eb56927e9fd6">XHDMIPHY1_GT_STATE_GPO_RE</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0abb6da8fd6d31dd97dea1910021b0d8f7">XHDMIPHY1_GT_STATE_IDLE</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0aeb66246b5c2c3de1c42d34fc8a5a9de2">XHDMIPHY1_GT_STATE_LOCK</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0af0bd0b978b52982e2caf6a30afc3f57d">XHDMIPHY1_GT_STATE_READY</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0adbd966511bbee7acb1ce508578605fb6">XHDMIPHY1_GT_STATE_RESET</a>, <a class="el" href="group__xhdmiphy1.html#gab75f3892f884d01f855d607291eba269">XHdmiphy1_IsHDMI()</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="gae9070f7158ccb8538edf80a5ec4c8da6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_HdmiGtDruModeEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the GT RX CDR and Equalization for DRU mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">Enable</td><td>enables the DRU logic (when 1), or disables (when 0).</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa9bd193450a0b8149982ea2bd8e4b334b">XHDMIPHY1_LOG_EVT_DRU_EN</a>, <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga1f26c79a098ddb33f610f5a88efc140e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_HdmiIntrHandlerCallbackInit </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the appropriate HDMI interupt handlers. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HDMIPHY instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__xhdmiphy1.html#gaed8eb9b3c3f96343f4358c9d54296af0">XHdmiphy1_SetIntrHandler()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="ga5a0a82f90d7a0f1c4c8180cfb465de0a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_HdmiRxTimerTimeoutHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function is the handler for RX timer timeout events. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HDMIPHY instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a2fb109c75352439b0e91bc457b98c110">XHdmiphy1_Config::DruRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1.html#a247ba8ff835a604c754d34ab3ba0450c">XHdmiphy1::HdmiRxDruIsEnabled</a>, <a class="el" href="struct_x_hdmiphy1___hdmi21_cfg.html#aa0dc355514f68382f6bfaced2f6e979b">XHdmiphy1_Hdmi21Cfg::IsEnabled</a>, <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad7df81b4c90d8f4d6ca34a614e7987d2">XHdmiphy1_Config::RxFrlRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1.html#a44a9b24f205fee3e03f3724a89abf2bb">XHdmiphy1::RxHdmi21Cfg</a>, <a class="el" href="struct_x_hdmiphy1___config.html#aa5b946a35a56f444442b88bfa49ae1bc">XHdmiphy1_Config::RxRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a42ccb139aa8c5a38d1b1446f57b9cb5c">XHdmiphy1_Channel::RxState</a>, <a class="el" href="group__xhdmiphy1.html#gaf3cb368774462d22b085a8e34d2c7a00">XHdmiphy1_CfgPllRefClkSel()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#gaeb31d823a71bad5b0bb6250b016577d7">XHdmiphy1_ClkReconfig()</a>, <a class="el" href="group__xhdmiphy1.html#gacfaf4756f5682dfda2739a8083deea56">XHdmiphy1_DirReconfig()</a>, <a class="el" href="group__xhdmiphy1.html#ga7b7a69d580eaac17960b977851aead25">XHdmiphy1_DruEnable()</a>, <a class="el" href="group__xhdmiphy1.html#ga97e1d4070dafe5a73d9bf60621382c98">XHdmiphy1_GetPllType()</a>, <a class="el" href="group__xhdmiphy1.html#gaf524ddfb56aa7742cf9c7fc777a2273a">XHdmiphy1_GetRcfgChId()</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0a8237da6c8720d2611ec2eb56927e9fd6">XHDMIPHY1_GT_STATE_GPO_RE</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0abb6da8fd6d31dd97dea1910021b0d8f7">XHDMIPHY1_GT_STATE_IDLE</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0aeb66246b5c2c3de1c42d34fc8a5a9de2">XHDMIPHY1_GT_STATE_LOCK</a>, <a class="el" href="group__xhdmiphy1.html#gae9070f7158ccb8538edf80a5ec4c8da6">XHdmiphy1_HdmiGtDruModeEnable()</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faf2277760e6b71229d82ecf73f95201da">XHDMIPHY1_LOG_EVT_RX_TMR</a>, <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>, <a class="el" href="group__xhdmiphy1.html#ga2b93ca125219d62f19817168267ddfc5">XHdmiphy1_MmcmSetClkinsel()</a>, <a class="el" href="group__xhdmiphy1.html#ga5dc7ec503e2e78570719440c12773984">XHdmiphy1_MmcmStart()</a>, <a class="el" href="group__xhdmiphy1.html#ga03e2d2bdcf56e256ff08f5776313a76e">XHdmiphy1_OutDivReconfig()</a>, <a class="el" href="group__xhdmiphy1.html#gaf1fbb7de9d26abab7332a62932be9d85">XHdmiphy1_PowerDownGtPll()</a>, <a class="el" href="group__xhdmiphy1.html#ga7f1f22be7f2029c396c015e322475790">XHdmiphy1_ResetGtPll()</a>, <a class="el" href="group__xhdmiphy1.html#ga2bf27809a22eecc5194a8bad16261280">XHdmiphy1_SetHdmiRxParam()</a>, and <a class="el" href="group__xhdmiphy1.html#ga0fa2836b8aac17e187bf1e01a462001a">XHdmiphy1_WriteCfgRefClkSelReg()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>.</p>

</div>
</div>
<a class="anchor" id="gada0844e8a6a828bb7d512259aca11498"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_HdmiTxTimerTimeoutHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function is the handler for TX timer timeout events. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HDMIPHY instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___hdmi21_cfg.html#aa0dc355514f68382f6bfaced2f6e979b">XHdmiphy1_Hdmi21Cfg::IsEnabled</a>, <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, <a class="el" href="struct_x_hdmiphy1.html#ac60ed4c71a5adcb71a99edad2997e24c">XHdmiphy1::TxHdmi21Cfg</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a6791024e367774619bbfeaedb022b6c1">XHdmiphy1_Channel::TxOutDiv</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a779d9cc95fb049278ff2c9249022f800">XHdmiphy1_Channel::TxState</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad890da2c40e7f26bdc43fcb09473a327">XHdmiphy1_Config::XcvrType</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#gaeb31d823a71bad5b0bb6250b016577d7">XHdmiphy1_ClkReconfig()</a>, <a class="el" href="group__xhdmiphy1.html#gacfaf4756f5682dfda2739a8083deea56">XHdmiphy1_DirReconfig()</a>, <a class="el" href="group__xhdmiphy1.html#ga97e1d4070dafe5a73d9bf60621382c98">XHdmiphy1_GetPllType()</a>, <a class="el" href="group__xhdmiphy1.html#gaf524ddfb56aa7742cf9c7fc777a2273a">XHdmiphy1_GetRcfgChId()</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0a8237da6c8720d2611ec2eb56927e9fd6">XHDMIPHY1_GT_STATE_GPO_RE</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0aeb66246b5c2c3de1c42d34fc8a5a9de2">XHDMIPHY1_GT_STATE_LOCK</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fafed065faee2d08d40b502fff4c292445">XHDMIPHY1_LOG_EVT_TX_TMR</a>, <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>, <a class="el" href="group__xhdmiphy1.html#ga5dc7ec503e2e78570719440c12773984">XHdmiphy1_MmcmStart()</a>, <a class="el" href="group__xhdmiphy1.html#ga03e2d2bdcf56e256ff08f5776313a76e">XHdmiphy1_OutDivReconfig()</a>, <a class="el" href="group__xhdmiphy1.html#gaf1fbb7de9d26abab7332a62932be9d85">XHdmiphy1_PowerDownGtPll()</a>, <a class="el" href="group__xhdmiphy1.html#ga7f1f22be7f2029c396c015e322475790">XHdmiphy1_ResetGtPll()</a>, <a class="el" href="group__xhdmiphy1.html#gafb115f999643adac66932d6c4a44de1c">XHdmiphy1_SetBufgGtDiv()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a579cfbb41fbd51477dd902f9a1758826">XHdmiphy1_TxAlignStart()</a>, and <a class="el" href="group__xhdmiphy1.html#ga0fa2836b8aac17e187bf1e01a462001a">XHdmiphy1_WriteCfgRefClkSelReg()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>.</p>

</div>
</div>
<a class="anchor" id="ga1d8702f582054727e5bafc4e6cf32739"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_HdmiUpdateClockSelection </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a>&#160;</td>
          <td class="paramname"><em>TxSysPllClkSel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a>&#160;</td>
          <td class="paramname"><em>RxSysPllClkSel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function Updates the HDMIPHY clocking. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">TxSysPllClkSel</td><td>is the SYSCLKDATA selection for TX. </td></tr>
    <tr><td class="paramname">RxSysPllClkSel</td><td>is the SYSCLKDATA selection for RX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a42ccb139aa8c5a38d1b1446f57b9cb5c">XHdmiphy1_Channel::RxState</a>, <a class="el" href="struct_x_hdmiphy1___config.html#aea6c3ccda8a54e9bdaac1730162e4200">XHdmiphy1_Config::RxSysPllClkSel</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a779d9cc95fb049278ff2c9249022f800">XHdmiphy1_Channel::TxState</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a2e9741628b8a5bb24c2f11e478f44b61">XHdmiphy1_Config::TxSysPllClkSel</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#gga19e4c793abee3457123797eca4f61cd0abb6da8fd6d31dd97dea1910021b0d8f7">XHDMIPHY1_GT_STATE_IDLE</a>, and <a class="el" href="group__xhdmiphy1.html#ga7f1f22be7f2029c396c015e322475790">XHdmiphy1_ResetGtPll()</a>.</p>

</div>
</div>
<a class="anchor" id="ga57aac6b723825d9999dc5419d067bda3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_IBufDsEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables the TX or RX IBUFDS peripheral. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Enable</td><td>specifies TRUE/FALSE value to either enable or disable the IBUFDS, respectively.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ac28bbc6cb3c52b7dfc77813be0af0be5">XHdmiphy1_Config::DruIsPresent</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a2fb109c75352439b0e91bc457b98c110">XHdmiphy1_Config::DruRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#aa5b946a35a56f444442b88bfa49ae1bc">XHdmiphy1_Config::RxRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#acad30878325a5832d62b791c22a2091a">XHdmiphy1_Config::TxRefClkSel</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gacb93fcb29ad3045d260d3fbbaa0be81e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_InterruptHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function is the interrupt handler for the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> driver. </p>
<p>It will detect what kind of interrupt has happened, and will invoke the appropriate callback function.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1.html#a1209c27b73680d5f924509cb1717ba11">XHdmiphy1::IntrCpllLockCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a299ed2990b28d0561a635f11b647cbd8">XHdmiphy1::IntrCpllLockHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#ae2ebcf179c7a4c5122606264c1313254">XHdmiphy1::IntrQpll1LockCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#af643b54434ad0e79c7059c26f77a29e7">XHdmiphy1::IntrQpll1LockHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#a3eb39abdf0e0de2bc7b2780116dad1fc">XHdmiphy1::IntrQpllLockCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#aba5d02fffa55f5c2ae38f24f3e48655d">XHdmiphy1::IntrQpllLockHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#ade70699e9fbb982482a8038c06f2b151">XHdmiphy1::IntrRxClkDetFreqChangeCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#aed8c859489a13cf7b883b4ed6d121420">XHdmiphy1::IntrRxClkDetFreqChangeHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#a236a6934b0578e57f77cc55e90e70326">XHdmiphy1::IntrRxMmcmLockCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#aba4ae1632f45de25ef1f548ecceb7a16">XHdmiphy1::IntrRxMmcmLockHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#ab108631f101eacc52db3574aca37ff1d">XHdmiphy1::IntrRxResetDoneCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#afbd86b5dc2ea02eca5f779558c23faaf">XHdmiphy1::IntrRxResetDoneHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#aa84057e2d584f28c2a571976f936296a">XHdmiphy1::IntrRxTmrTimeoutCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#acdae64b5744677ee58564afda2116bda">XHdmiphy1::IntrRxTmrTimeoutHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#acb9f1f5c38f678dfe435d1872d93c409">XHdmiphy1::IntrTxAlignDoneCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a9f4e3631341fe886a566a1c615109296">XHdmiphy1::IntrTxAlignDoneHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#ae5127143c4688998c92ed8eafb2ba7b2">XHdmiphy1::IntrTxClkDetFreqChangeCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a9e829bc4a1ba14c7973ee6d805a95de6">XHdmiphy1::IntrTxClkDetFreqChangeHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#a843def0eed56f4054c7f361715558b7c">XHdmiphy1::IntrTxMmcmLockCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a87976bb014b2a6f2e84e47ca3ded5cb3">XHdmiphy1::IntrTxMmcmLockHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#a6ecd9f63b374c8c8def7c8894f6340ec">XHdmiphy1::IntrTxResetDoneCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a4f9c49683a90aa9841be70039e7dea31">XHdmiphy1::IntrTxResetDoneHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#a2ea3d02859ef83099982ca7a91a16ca7">XHdmiphy1::IntrTxTmrTimeoutCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a65c3d295faeab03e349abbdce936ebad">XHdmiphy1::IntrTxTmrTimeoutHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#a2410c544d217821ce4e85e391b1c676a">XHdmiphy1::IsReady</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="gabb09df5f9b1e2f799160dd944d8ae935"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_IntrDisable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga0babc37b8b55084caeefe57eef4fbd62">XHdmiphy1_IntrHandlerType</a>&#160;</td>
          <td class="paramname"><em>Intr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function disabled interrupts associated with the specified interrupt type. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance. </td></tr>
    <tr><td class="paramname">Intr</td><td>is the interrupt type/mask to disable.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>, and <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf1923a89392fcc152f571818d2ad564f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_IntrEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga0babc37b8b55084caeefe57eef4fbd62">XHdmiphy1_IntrHandlerType</a>&#160;</td>
          <td class="paramname"><em>Intr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables interrupts associated with the specified interrupt type. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance. </td></tr>
    <tr><td class="paramname">Intr</td><td>is the interrupt type/mask to enable.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga1e17b8f3099b9edb96bdf732671b7efc">XHdmiphy1_Hdmi20Config()</a>, and <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gab75f3892f884d01f855d607291eba269"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u8 XHdmiphy1_IsHDMI </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function checks if Instance is HDMI 2.0 or HDMI 2.1. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the HDMIPHY instance. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for RX or TX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>TRUE if HDMI 2.0 or 2.1 else FALSE.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ac740909a82f7887fbb3b27bf25aeb99d">XHdmiphy1_Config::RxProtocol</a>, and <a class="el" href="struct_x_hdmiphy1___config.html#a9daac9ee0c1db4441707eb89d83e69f7">XHdmiphy1_Config::TxProtocol</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#gaeb31d823a71bad5b0bb6250b016577d7">XHdmiphy1_ClkReconfig()</a>, <a class="el" href="group__xhdmiphy1.html#ga7cd4d4f88631190ea51009300a15b783">XHdmiphy1_GetPllVcoFreqHz()</a>, <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>, <a class="el" href="group__xhdmiphy1.html#ga16dfea31e43d9da2c4c00cd0785b6248">XHdmiphy1_HdmiDebugInfo()</a>, and <a class="el" href="group__xhdmiphy1.html#gac05b90ab984e726f1ddde5cf265915d9">XHdmiphy1_IsPllLocked()</a>.</p>

</div>
</div>
<a class="anchor" id="gac05b90ab984e726f1ddde5cf265915d9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_IsPllLocked </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will check the status of a PLL lock on the specified channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID which to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the specified PLL is locked.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga97e1d4070dafe5a73d9bf60621382c98">XHdmiphy1_GetPllType()</a>, <a class="el" href="group__xhdmiphy1.html#gab75f3892f884d01f855d607291eba269">XHdmiphy1_IsHDMI()</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#acc32a98d0cf6cf638c3fe4e3fe057226">XHdmiphy1_HdmiCpllLockHandler()</a>, and <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a0dadbdee261d92500f5c3a5f55b76218">XHdmiphy1_HdmiQpllLockHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga9569d5080ff8e2396239ecfb7d1de91d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_LogDisplay </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will print the entire log. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a55611128c68a9548afe47eae8d761788">XHdmiphy1::Log</a>, <a class="el" href="struct_x_hdmiphy1.html#ae496b497afcb2b9faa866238d7cc2f11">XHdmiphy1::LogWriteCallback</a>, <a class="el" href="struct_x_hdmiphy1___log.html#a57a00295ae173b3a621143d25f6dbb7b">XHdmiphy1_Log::TailIndex</a>, <a class="el" href="struct_x_hdmiphy1___log.html#a86337d2bdd53556fd296bd6d58de83ea">XHdmiphy1_Log::TimeRecord</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa737d1a41d1b1a576101bd574080f08d1">XHDMIPHY1_LOG_EVT_1PPC_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa6291555f8d5842b49cc85b1992b93171">XHDMIPHY1_LOG_EVT_CPLL_EN</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fadb7701b9317cdb208995d002892d0eac">XHDMIPHY1_LOG_EVT_CPLL_LOCK</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fafe46d81b98d1f454e167f1850d51e73c">XHDMIPHY1_LOG_EVT_CPLL_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa84d8493337faf9af93ce135edca252ae">XHDMIPHY1_LOG_EVT_CPLL_RST</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa16d87e8ac61927ee62d631af02a55eea">XHDMIPHY1_LOG_EVT_DRU_CLK_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa9bd193450a0b8149982ea2bd8e4b334b">XHDMIPHY1_LOG_EVT_DRU_EN</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fae974e310d8245fa9285d8a3d460c6701">XHDMIPHY1_LOG_EVT_FRL_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa1591a806934dc21fa2368d022cd0f12d">XHDMIPHY1_LOG_EVT_GT_CPLL_CFG_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa4f69c113ecd57c23854146858f0c9269">XHDMIPHY1_LOG_EVT_GT_LCPLL_CFG_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fac16c7e8601244f595cd804fe75df142b">XHDMIPHY1_LOG_EVT_GT_QPLL_CFG_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab037d8fe4e7d9efa115f91602c0e19d5">XHDMIPHY1_LOG_EVT_GT_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa31b63c120656778e61b40ac16e914019">XHDMIPHY1_LOG_EVT_GT_RPLL_CFG_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa1950033e842d74ae93cf70842b6f9f03">XHDMIPHY1_LOG_EVT_GT_RX_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fac9bbc691736d2c3f8ecf4456e98b7b18">XHDMIPHY1_LOG_EVT_GT_TX_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab48a003daba5c49c31327d31a7344fdb">XHDMIPHY1_LOG_EVT_GTRX_RST</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fae3b7e5bdbde62c0539b69660ff718a2f">XHDMIPHY1_LOG_EVT_GTTX_RST</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa53ab59ff98e6c0f14d01b573c1adb9ad">XHDMIPHY1_LOG_EVT_HDMI20_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faec83e85f882616806c051d6280541031">XHDMIPHY1_LOG_EVT_INIT</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa8579679c6be1018462759ab6d24f694a">XHDMIPHY1_LOG_EVT_LCPLL_LOCK</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fae623db986f9d02253c3ccbec9f5c6963">XHDMIPHY1_LOG_EVT_MMCM_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fad34e90440aa943deb81d65f994e7272b">XHDMIPHY1_LOG_EVT_NO_DRU</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab955fbee9a933ef6bbebf9d04a8ad1db">XHDMIPHY1_LOG_EVT_NO_QPLL_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa05c6742ec935bcbad19af54685b3d9f5">XHDMIPHY1_LOG_EVT_NONE</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa618c0fbfd33c119da0e2b28cf514972d">XHDMIPHY1_LOG_EVT_PPC_MSMTCH_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa91285a2fe900849e83aa45be23b8fc31">XHDMIPHY1_LOG_EVT_QPLL_EN</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fae542d14fe31f4366262597571621900b">XHDMIPHY1_LOG_EVT_QPLL_LOCK</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fad1a525f5335b7c7814e19fc19e8dee78">XHDMIPHY1_LOG_EVT_QPLL_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa2f2949d1be35d7c96902fe8b031d6251">XHDMIPHY1_LOG_EVT_QPLL_RST</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa88ab82faf45e848827696960f46af78b">XHDMIPHY1_LOG_EVT_RPLL_LOCK</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa7e97df6b0482956381f42935d4088413">XHDMIPHY1_LOG_EVT_RX_FREQ</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa07750319efaea19cbec4aa97eab21bee">XHDMIPHY1_LOG_EVT_RX_RST_DONE</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faf2277760e6b71229d82ecf73f95201da">XHDMIPHY1_LOG_EVT_RX_TMR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab5aab4974e5d695941267b02c063b6bf">XHDMIPHY1_LOG_EVT_RXGPO_RE</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab005d48a1421a996107763e25a79ed6a">XHDMIPHY1_LOG_EVT_RXPLL_EN</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa56be305ac94b4fde45ed7f96f2f60416">XHDMIPHY1_LOG_EVT_RXPLL_LOCK</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faf0cd31f3544b0433a61a07313f7306c4">XHDMIPHY1_LOG_EVT_RXPLL_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa34f1adc5b5220146133d12c5c673c466">XHDMIPHY1_LOG_EVT_RXPLL_RST</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa087c065913419984d661cf0488fe3e7e">XHDMIPHY1_LOG_EVT_SPDGRDE_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa924af29f57a82f33882dce6c2de2215b">XHDMIPHY1_LOG_EVT_TMDS_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa4977e4ce8c8d2017bbc96f3675325b99">XHDMIPHY1_LOG_EVT_TX_ALIGN</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faac936f6bc91762d6621757e29b471994">XHDMIPHY1_LOG_EVT_TX_ALIGN_TMOUT</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa8e08806e0035981f0aeac11963e9b29d">XHDMIPHY1_LOG_EVT_TX_FREQ</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faf1558ff041531923de26d2cdf21faeb5">XHDMIPHY1_LOG_EVT_TX_RST_DONE</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fafed065faee2d08d40b502fff4c292445">XHDMIPHY1_LOG_EVT_TX_TMR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fad1249231d3dd37dc9b246750de6c468a">XHDMIPHY1_LOG_EVT_TXGPO_RE</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab85fcce757da0b66c9944fa7f7d75eef">XHDMIPHY1_LOG_EVT_TXPLL_EN</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faecedb4454e45d609203050d25fb628a9">XHDMIPHY1_LOG_EVT_TXPLL_LOCK</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8facd89910057776a6a302595c1e6aaf263">XHDMIPHY1_LOG_EVT_TXPLL_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faed656efbf8d1665cc583db964226960a">XHDMIPHY1_LOG_EVT_TXPLL_RST</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fabf63790d5f5a16fdfbbd3c5d2680fa29">XHDMIPHY1_LOG_EVT_USRCLK_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa1c67cc48ccc5a88ac43e15fe694879b6">XHDMIPHY1_LOG_EVT_VD_NOT_SPRTD_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fab28d0791b29cf76ead1a21aef864e70c">XHDMIPHY1_LOG_EVT_VDCLK_HIGH_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa3dbbacab895e2f48455597b95f20d3e6">XHDMIPHY1_LOG_EVT_VID_RX_RST</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa6ba098981c6f7e8717ab0b3d166facdc">XHDMIPHY1_LOG_EVT_VID_TX_RST</a>, and <a class="el" href="group__xhdmiphy1.html#gafef83d134d6ba3cf7ed6ff58c5aa76c0">XHdmiphy1_LogRead()</a>.</p>

</div>
</div>
<a class="anchor" id="gafef83d134d6ba3cf7ed6ff58c5aa76c0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u16 XHdmiphy1_LogRead </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will read the last event from the log. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The log data.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___log.html#ac50c0926cdaf64d0ed1c40109c691488">XHdmiphy1_Log::DataBuffer</a>, <a class="el" href="struct_x_hdmiphy1___log.html#aff3f2cc23ac4d08a0cca4533c6413517">XHdmiphy1_Log::HeadIndex</a>, <a class="el" href="struct_x_hdmiphy1.html#a55611128c68a9548afe47eae8d761788">XHdmiphy1::Log</a>, and <a class="el" href="struct_x_hdmiphy1___log.html#a57a00295ae173b3a621143d25f6dbb7b">XHdmiphy1_Log::TailIndex</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga9569d5080ff8e2396239ecfb7d1de91d">XHdmiphy1_LogDisplay()</a>.</p>

</div>
</div>
<a class="anchor" id="ga67dcfc543f278ca875c99f6dada92520"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_LogReset </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will reset the driver's logginc mechanism. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___log.html#aff3f2cc23ac4d08a0cca4533c6413517">XHdmiphy1_Log::HeadIndex</a>, <a class="el" href="struct_x_hdmiphy1.html#a55611128c68a9548afe47eae8d761788">XHdmiphy1::Log</a>, and <a class="el" href="struct_x_hdmiphy1___log.html#a57a00295ae173b3a621143d25f6dbb7b">XHdmiphy1_Log::TailIndex</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gabda0c5df35f1e8c13b871c8edf38ff38"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_LogWrite </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga507763f75897762cabf8819fde24ab8f">XHdmiphy1_LogEvent</a>&#160;</td>
          <td class="paramname"><em>Evt</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Data</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will insert an event in the driver's logginc mechanism. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">Evt</td><td>is the event type to log. </td></tr>
    <tr><td class="paramname">Data</td><td>is the associated data for the event.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___log.html#ac50c0926cdaf64d0ed1c40109c691488">XHdmiphy1_Log::DataBuffer</a>, <a class="el" href="struct_x_hdmiphy1___log.html#aff3f2cc23ac4d08a0cca4533c6413517">XHdmiphy1_Log::HeadIndex</a>, <a class="el" href="struct_x_hdmiphy1.html#a55611128c68a9548afe47eae8d761788">XHdmiphy1::Log</a>, <a class="el" href="struct_x_hdmiphy1.html#ae496b497afcb2b9faa866238d7cc2f11">XHdmiphy1::LogWriteCallback</a>, <a class="el" href="struct_x_hdmiphy1.html#ad0bd5b3366de6fd019ba397cabdc37f2">XHdmiphy1::LogWriteRef</a>, <a class="el" href="struct_x_hdmiphy1___log.html#a57a00295ae173b3a621143d25f6dbb7b">XHdmiphy1_Log::TailIndex</a>, <a class="el" href="struct_x_hdmiphy1___log.html#a86337d2bdd53556fd296bd6d58de83ea">XHdmiphy1_Log::TimeRecord</a>, and <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fac5e344d7d6b6232fbba3fa5698de8532">XHDMIPHY1_LOG_EVT_DUMMY</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaeb31d823a71bad5b0bb6250b016577d7">XHdmiphy1_ClkReconfig()</a>, <a class="el" href="group__xhdmiphy1.html#gacfaf4756f5682dfda2739a8083deea56">XHdmiphy1_DirReconfig()</a>, <a class="el" href="group__xhdmiphy1.html#ga1e17b8f3099b9edb96bdf732671b7efc">XHdmiphy1_Hdmi20Config()</a>, <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>, <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>, <a class="el" href="group__xhdmiphy1.html#gafa361514e8315c25876867a1ded2c99b">XHdmiphy1_HdmiCfgCalcMmcmParam()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#acc32a98d0cf6cf638c3fe4e3fe057226">XHdmiphy1_HdmiCpllLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#aefc037877ed6316c6995845442a31971">XHdmiphy1_HdmiCpllParam()</a>, <a class="el" href="group__xhdmiphy1.html#gae9070f7158ccb8538edf80a5ec4c8da6">XHdmiphy1_HdmiGtDruModeEnable()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a0c603299dc1bafabcf0ecfe920bd412b">XHdmiphy1_HdmiGtRxResetDoneLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#aa2c97194ee284139b2959025092cc122">XHdmiphy1_HdmiGtTxAlignDoneLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#ad65db64a87467172db631b182c2ddd2d">XHdmiphy1_HdmiGtTxResetDoneLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a0dadbdee261d92500f5c3a5f55b76218">XHdmiphy1_HdmiQpllLockHandler()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a026bd874ba52e36d8f0e770b962543f9">XHdmiphy1_HdmiQpllParam()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a8343476157eb6fa497444d979423298f">XHdmiphy1_HdmiRxMmcmLockHandler()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#afc3e2c76a28022e9d12a96990cc2fc83">XHdmiphy1_HdmiTxClkDetFreqChangeHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a26779b95f3fc97265ce6997044426637">XHdmiphy1_HdmiTxMmcmLockHandler()</a>, <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>, <a class="el" href="group__xhdmiphy1.html#ga5dc7ec503e2e78570719440c12773984">XHdmiphy1_MmcmStart()</a>, <a class="el" href="group__xhdmiphy1.html#ga03e2d2bdcf56e256ff08f5776313a76e">XHdmiphy1_OutDivReconfig()</a>, and <a class="el" href="group__xhdmiphy1.html#ga69e679f0c4444350910817be69cde77c">XHdmiphy1_SetHdmiTxParam()</a>.</p>

</div>
</div>
<a class="anchor" id="ga00ae2fd009178f0fbdefc1764abdea0f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="struct_x_hdmiphy1___config.html">XHdmiphy1_Config</a>* XHdmiphy1_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function looks for the device configuration based on the unique device ID. </p>
<p>The table XHdmiphy1_ConfigTable[] contains the configuration information for each device in the system.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>is the unique device ID of the device being looked up.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

</div>
</div>
<a class="anchor" id="ga0b46b7c2c9c6d5fbe7e7c2a6d226b985"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u8 XHdmiphy1_MmcmLocked </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will get the lock status of the mixed-mode clock manager (MMCM) core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>TRUE if Locked else FALSE.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga6d652ca1a4650bc5a2762d381a110f6b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_MmcmLockedMaskEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will reset the mixed-mode clock manager (MMCM) core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Enable</td><td>is an indicator whether to "Enable" the locked mask if set to 1. If set to 0: reset, then disable.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#afc3e2c76a28022e9d12a96990cc2fc83">XHdmiphy1_HdmiTxClkDetFreqChangeHandler()</a>, and <a class="el" href="group__xhdmiphy1.html#ga5dc7ec503e2e78570719440c12773984">XHdmiphy1_MmcmStart()</a>.</p>

</div>
</div>
<a class="anchor" id="ga13859cf616b98f6d37336128b9f3f21a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_MmcmPowerDown </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Hold</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will power down the mixed-mode clock manager (MMCM) core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Hold</td><td>is an indicator whether to "hold" the power down if set to 1. If set to 0: power down, then power back up.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga47707c2203c7788afdfb22fe1ae438db"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_MmcmReset </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Hold</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will reset the mixed-mode clock manager (MMCM) core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Hold</td><td>is an indicator whether to "hold" the reset if set to 1. If set to 0: reset, then enable.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>, and <a class="el" href="group__xhdmiphy1.html#ga5dc7ec503e2e78570719440c12773984">XHdmiphy1_MmcmStart()</a>.</p>

</div>
</div>
<a class="anchor" id="ga2b93ca125219d62f19817168267ddfc5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_MmcmSetClkinsel </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_MmcmClkinsel&#160;</td>
          <td class="paramname"><em>Sel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will set the CLKINSEL port of the MMCM. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Sel</td><td>CLKINSEL value 0 - CLKIN1 1 - CLKIN2</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga1e17b8f3099b9edb96bdf732671b7efc">XHdmiphy1_Hdmi20Config()</a>, <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>, and <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga5dc7ec503e2e78570719440c12773984"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_MmcmStart </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will start the mixed-mode clock manager (MMCM) core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a20e2ef2834674875c1643c822897ad42">XHdmiphy1_Config::RxClkPrimitive</a>, <a class="el" href="struct_x_hdmiphy1___quad.html#a88cada401818f6a963529acb20cc87c9">XHdmiphy1_Quad::RxMmcm</a>, <a class="el" href="struct_x_hdmiphy1___config.html#a4dc8998eda218c14bd49e0ed7c374657">XHdmiphy1_Config::TxClkPrimitive</a>, <a class="el" href="struct_x_hdmiphy1___quad.html#aa8cde6b8904a6c5dffd5546c23f2c244">XHdmiphy1_Quad::TxMmcm</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8faf0cd31f3544b0433a61a07313f7306c4">XHDMIPHY1_LOG_EVT_RXPLL_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8facd89910057776a6a302595c1e6aaf263">XHDMIPHY1_LOG_EVT_TXPLL_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>, <a class="el" href="group__xhdmiphy1.html#ga6d652ca1a4650bc5a2762d381a110f6b">XHdmiphy1_MmcmLockedMaskEnable()</a>, and <a class="el" href="group__xhdmiphy1.html#ga47707c2203c7788afdfb22fe1ae438db">XHdmiphy1_MmcmReset()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, and <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga03e2d2bdcf56e256ff08f5776313a76e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_OutDivReconfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will set the current output divider configuration over DRP. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID for which to write the settings for. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for RX or TX.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the configuration was successful.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa1950033e842d74ae93cf70842b6f9f03">XHDMIPHY1_LOG_EVT_GT_RX_RECONFIG</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fac9bbc691736d2c3f8ecf4456e98b7b18">XHDMIPHY1_LOG_EVT_GT_TX_RECONFIG</a>, and <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, and <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gafe6529e3429c7199f87f7f8fc7f43fe0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_PatgenEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables or disables the Pattern Generator for the GT Channel 4 when it isused to generate the TX TMDS Clock. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">Enable</td><td>TRUE/FALSE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#ad65db64a87467172db631b182c2ddd2d">XHdmiphy1_HdmiGtTxResetDoneLockHandler()</a>, and <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#afc3e2c76a28022e9d12a96990cc2fc83">XHdmiphy1_HdmiTxClkDetFreqChangeHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga51d10d93fa76ebe0c031600b61955d4d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_PatgenSetRatio </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>TxLineRate</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the Pattern Generator for the GT Channel 4 when it is used to generate the TX TMDS Clock. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">TxLineRate</td><td>in Mbps.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1.html#aa0e3e6f1c5e328af0628bc58d19e915a">XHdmiphy1::HdmiTxSampleRate</a>, <a class="el" href="group__xhdmiphy1.html#gga99fd3078ca6a97efc41ebae0ab9848b4a35d0720f27d6bb3698e239fe2a9e79dd">XHDMIPHY1_Patgen_Ratio_40</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#ad65db64a87467172db631b182c2ddd2d">XHdmiphy1_HdmiGtTxResetDoneLockHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga27c96bba79f91125a226948b139fe9d3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="group__xhdmiphy1.html#ga4d998790546ec3dde5119376868686e6">XHdmiphy1_SysClkDataSelType</a> XHdmiphy1_Pll2SysClkData </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a>&#160;</td>
          <td class="paramname"><em>PllSelect</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will translate from XHdmiphy1_PllType to XHdmiphy1_SysClkDataSelType. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The reference clock type based on the PLL selection.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga82f13f4133bdf9ab03d845c8462dc091">XHdmiphy1_PllInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gad369e0c6d06d2f66606c845b3976fe75"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="group__xhdmiphy1.html#gac87909fabb3f765c0be156e7082aea8e">XHdmiphy1_SysClkOutSelType</a> XHdmiphy1_Pll2SysClkOut </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a>&#160;</td>
          <td class="paramname"><em>PllSelect</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will translate from XHdmiphy1_PllType to XHdmiphy1_SysClkOutSelType. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The reference clock type based on the PLL selection.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga82f13f4133bdf9ab03d845c8462dc091">XHdmiphy1_PllInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="ga87f9523a81f1b648cfae0172bdd96f0b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_PllCalculator </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>PllClkInFreqHz</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will try to find the necessary PLL divisor values to produce the configured line rate given the specified PLL input frequency. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to calculate the PLL values for. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to calculate the PLL values for. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">PllClkInFreqHz</td><td>is the PLL input frequency on which to base the calculations on. A value of 0 indicates to use the currently configured quad PLL reference clock. A non-zero value indicates to ignore what is currently configured in SW, and use a custom frequency instead.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if valid PLL values were found to satisfy the constraints.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If successful, the channel's PllParams structure will be modified with the valid PLL parameters. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___channel.html#ab40f4cd71a6a17e5fadfb0e51c96f310">XHdmiphy1_Channel::LineRateHz</a>, <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, and <a class="el" href="group__xhdmiphy1.html#gaaa8cf29813f43a1066492adea335bf48">XHdmiphy1_GetQuadRefClkFreq()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gad8f3d6250fe7c2d7384a5f20507da509">XHdmiphy1_ClkCalcParams()</a>.</p>

</div>
</div>
<a class="anchor" id="ga82f13f4133bdf9ab03d845c8462dc091"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_PllInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#gaec55cf3dfcfa0c7cf9749c63690dd019">XHdmiphy1_PllRefClkSelType</a>&#160;</td>
          <td class="paramname"><em>QpllRefClkSel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#gaec55cf3dfcfa0c7cf9749c63690dd019">XHdmiphy1_PllRefClkSelType</a>&#160;</td>
          <td class="paramname"><em>CpllRefClkSel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a>&#160;</td>
          <td class="paramname"><em>TxPllSelect</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#gae8559ee2ca7c404467a72f4653a5d4f5">XHdmiphy1_PllType</a>&#160;</td>
          <td class="paramname"><em>RxPllSelect</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will initialize the PLL selection for a given channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">QpllRefClkSel</td><td>is the QPLL reference clock selection for the quad. </td></tr>
    <tr><td class="paramname">CpllRefClkSel</td><td>is the CPLL reference clock selection for the quad. </td></tr>
    <tr><td class="paramname">TxPllSelect</td><td>is the reference clock selection for the quad's TX PLL dividers. </td></tr>
    <tr><td class="paramname">RxPllSelect</td><td>is the reference clock selection for the quad's RX PLL dividers.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__xhdmiphy1.html#gaf3cb368774462d22b085a8e34d2c7a00">XHdmiphy1_CfgPllRefClkSel()</a>, <a class="el" href="group__xhdmiphy1.html#ga4e6b72ef1579950b4c8c83e35e7ad4b0">XHdmiphy1_CfgSysClkDataSel()</a>, <a class="el" href="group__xhdmiphy1.html#ga738210e1c11e69176f1cd733ff0bae6c">XHdmiphy1_CfgSysClkOutSel()</a>, <a class="el" href="group__xhdmiphy1.html#ga27c96bba79f91125a226948b139fe9d3">XHdmiphy1_Pll2SysClkData()</a>, <a class="el" href="group__xhdmiphy1.html#gad369e0c6d06d2f66606c845b3976fe75">XHdmiphy1_Pll2SysClkOut()</a>, and <a class="el" href="group__xhdmiphy1.html#ga0fa2836b8aac17e187bf1e01a462001a">XHdmiphy1_WriteCfgRefClkSelReg()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf1fbb7de9d26abab7332a62932be9d85"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_PowerDownGtPll </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Hold</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will power down the specified GT PLL. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to power down the PLL for. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Hold</td><td>is an indicator whether to "hold" the power down if set to 1. If set to 0: power down, then power back up.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#afc3e2c76a28022e9d12a96990cc2fc83">XHdmiphy1_HdmiTxClkDetFreqChangeHandler()</a>, and <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga8dc19df05e15d413e62ff62d2c22c023"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_RegisterDebug </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function prints out Video PHY register and GT Channel and Common DRP register contents. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the Hdmiphy core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1.html#a7db1a3f7a4d313d9d8d279036680a7bb">XHdmiphy1::HdmiIsQpllPresent</a>, <a class="el" href="struct_x_hdmiphy1___config.html#af477236d1bfcdcf060a5d2bb64e46d8f">XHdmiphy1_Config::RxChannels</a>, <a class="el" href="struct_x_hdmiphy1___config.html#abed1d8f66f62de3bf785f81d0acbfd63">XHdmiphy1_Config::TxChannels</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad890da2c40e7f26bdc43fcb09473a327">XHdmiphy1_Config::XcvrType</a>, <a class="el" href="group__xhdmiphy1.html#ga55c5c6061828e1f986b64d4c0ae9a57b">XHdmiphy1_DrpRd()</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga7f1f22be7f2029c396c015e322475790"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_ResetGtPll </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Hold</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will reset the GT's PLL logic. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID which to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Hold</td><td>is an indicator whether to "hold" the reset if set to 1. If set to 0: reset, then enable.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a80cae1429b5d37ffec8de9763de00f56">XHdmiphy1_HdmiRxClkDetFreqChangeHandler()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#afc3e2c76a28022e9d12a96990cc2fc83">XHdmiphy1_HdmiTxClkDetFreqChangeHandler()</a>, <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>, and <a class="el" href="group__xhdmiphy1.html#ga1d8702f582054727e5bafc4e6cf32739">XHdmiphy1_HdmiUpdateClockSelection()</a>.</p>

</div>
</div>
<a class="anchor" id="ga117b1b06a6044a0574731e960e8e304a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_ResetGtTxRx </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Hold</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will reset the GT's TX/RX logic. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID which to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Hold</td><td>is an indicator whether to "hold" the reset if set to 1. If set to 0: reset, then enable.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#acc32a98d0cf6cf638c3fe4e3fe057226">XHdmiphy1_HdmiCpllLockHandler()</a>, and <a class="el" href="xhdmiphy1__hdmi__intr_8c.html#a0dadbdee261d92500f5c3a5f55b76218">XHdmiphy1_HdmiQpllLockHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga08947cfedb541b7f95242c82ee60a8c5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_SelfTest </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function runs a self-test on the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> driver/device. </p>
<p>The sanity test checks whether or not all tested registers hold their default reset values.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the self-test passed - all tested registers hold their default reset values.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, and <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="gafb115f999643adac66932d6c4a44de1c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_SetBufgGtDiv </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Div</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function obtains the divider value of the BUFG_GT peripheral. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX </td></tr>
    <tr><td class="paramname">Div</td><td>3-bit divider value</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>, and <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga90147f575dee01a888964ba10cdf4f73"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_SetErrorCallback </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackFunc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackRef</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function installs a callback function for the HDMIPHY error conditions. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance. </td></tr>
    <tr><td class="paramname">CallbackFunc</td><td>is the address to the callback function. </td></tr>
    <tr><td class="paramname">CallbackRef</td><td>is the user data item that will be passed to the callback function when it is invoked.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The XHdmiphy1_ErrorHandler API calls the registered function in ErrorCallback and passes two arguments: 1) CallbackRef 2) Error Type as defined by XHdmiphy1_ErrType.</dd></dl>
<p>Sample Function Call: CallbackFunc(CallbackRef, XHdmiphy1_ErrType); </p>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a9a1e64dac33e66a6aa4f174f91b8e399">XHdmiphy1::ErrorCallback</a>, and <a class="el" href="struct_x_hdmiphy1.html#a43d930ddd0de54af43270cac39e01ee6">XHdmiphy1::ErrorRef</a>.</p>

</div>
</div>
<a class="anchor" id="ga64e64512cb8f987620763078fe9e796d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_SetHdmiCallback </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga8df8a80a15683dd3ffe31d80780f6329">XHdmiphy1_HdmiHandlerType</a>&#160;</td>
          <td class="paramname"><em>HandlerType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackFunc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackRef</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function installs an HDMI callback function for the specified handler type. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance. </td></tr>
    <tr><td class="paramname">HandlerType</td><td>is the interrupt handler type which specifies which interrupt event to attach the callback for. </td></tr>
    <tr><td class="paramname">CallbackFunc</td><td>is the address to the callback function. </td></tr>
    <tr><td class="paramname">CallbackRef</td><td>is the user data item that will be passed to the callback function when it is invoked.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#aaa13d6af8f3fe8a2c65e72c04b90ac9a">XHdmiphy1::HdmiRxInitCallback</a>, <a class="el" href="struct_x_hdmiphy1.html#a8ec4992b8e52da29e3ac98481076046d">XHdmiphy1::HdmiRxInitRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a72c70f721f4e3d31f49afdc2d03aaa0b">XHdmiphy1::HdmiRxReadyCallback</a>, <a class="el" href="struct_x_hdmiphy1.html#aca4f8069578f878456f2b1c3e892280c">XHdmiphy1::HdmiRxReadyRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a16c66793a6e7e041fc3a945aec7be90d">XHdmiphy1::HdmiTxInitCallback</a>, <a class="el" href="struct_x_hdmiphy1.html#a972876ed3eaec1defefa3f6c2d620b73">XHdmiphy1::HdmiTxInitRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a6935afe96ca7e4bc731a4cc68be0c3c6">XHdmiphy1::HdmiTxReadyCallback</a>, <a class="el" href="struct_x_hdmiphy1.html#a6c024d30eed9502ce115cb9d356d6e7a">XHdmiphy1::HdmiTxReadyRef</a>, <a class="el" href="group__xhdmiphy1.html#gga8df8a80a15683dd3ffe31d80780f6329a57c314d217e86af61f9e4e7d6e446e83">XHDMIPHY1_HDMI_HANDLER_RXINIT</a>, <a class="el" href="group__xhdmiphy1.html#gga8df8a80a15683dd3ffe31d80780f6329a419d981d4a35b761784f48e87adba9b3">XHDMIPHY1_HDMI_HANDLER_RXREADY</a>, <a class="el" href="group__xhdmiphy1.html#gga8df8a80a15683dd3ffe31d80780f6329a96b12cc5ff9908c81fcb6231b7aec8ac">XHDMIPHY1_HDMI_HANDLER_TXINIT</a>, and <a class="el" href="group__xhdmiphy1.html#gga8df8a80a15683dd3ffe31d80780f6329ae806cfadcc91063cd2bbeb8482f79433">XHDMIPHY1_HDMI_HANDLER_TXREADY</a>.</p>

</div>
</div>
<a class="anchor" id="ga2bf27809a22eecc5194a8bad16261280"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_SetHdmiRxParam </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function update/set the HDMI RX parameter. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the Hdmiphy core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if RX parameters set/updated.</li>
<li>XST_FAILURE if low resolution video not supported.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a247ba8ff835a604c754d34ab3ba0450c">XHdmiphy1::HdmiRxDruIsEnabled</a>, <a class="el" href="group__xhdmiphy1.html#ga4c7a948926fede8a6548c6cffe5fc830">XHdmiphy1_DruCalcCenterFreqHz()</a>, <a class="el" href="group__xhdmiphy1.html#ga02899710d93b44ffa5d6f87637d67809">XHdmiphy1_DruSetCenterFreqHz()</a>, <a class="el" href="group__xhdmiphy1.html#ga97e1d4070dafe5a73d9bf60621382c98">XHdmiphy1_GetPllType()</a>, <a class="el" href="group__xhdmiphy1.html#gaf524ddfb56aa7742cf9c7fc777a2273a">XHdmiphy1_GetRcfgChId()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#aefc037877ed6316c6995845442a31971">XHdmiphy1_HdmiCpllParam()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a026bd874ba52e36d8f0e770b962543f9">XHdmiphy1_HdmiQpllParam()</a>, and <a class="el" href="group__xhdmiphy1.html#ga0fa2836b8aac17e187bf1e01a462001a">XHdmiphy1_WriteCfgRefClkSelReg()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga69e679f0c4444350910817be69cde77c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_SetHdmiTxParam </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_PixelsPerClock&#160;</td>
          <td class="paramname"><em>Ppc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_ColorDepth&#160;</td>
          <td class="paramname"><em>Bpc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_ColorFormat&#160;</td>
          <td class="paramname"><em>ColorFormat</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function update/set the HDMI TX parameter. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the Hdmiphy core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">Ppc</td><td>is the pixels per clock to set. </td></tr>
    <tr><td class="paramname">Bpc</td><td>is the bits per color to set. </td></tr>
    <tr><td class="paramname">ColorFormat</td><td>is the color format to set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if TX parameters set/updated.</li>
<li>XST_FAILURE if low resolution video not supported.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___hdmi21_cfg.html#aa0dc355514f68382f6bfaced2f6e979b">XHdmiphy1_Hdmi21Cfg::IsEnabled</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ae1e3334ec7a5182a8bfef0d88503c8b4">XHdmiphy1_Config::Ppc</a>, <a class="el" href="struct_x_hdmiphy1.html#ac60ed4c71a5adcb71a99edad2997e24c">XHdmiphy1::TxHdmi21Cfg</a>, <a class="el" href="group__xhdmiphy1.html#ga3fc9cb2326efad44689d4af163343b7f">XHdmiphy1_ErrorHandler()</a>, <a class="el" href="group__xhdmiphy1.html#gafa361514e8315c25876867a1ded2c99b">XHdmiphy1_HdmiCfgCalcMmcmParam()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#aefc037877ed6316c6995845442a31971">XHdmiphy1_HdmiCpllParam()</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a026bd874ba52e36d8f0e770b962543f9">XHdmiphy1_HdmiQpllParam()</a>, <a class="el" href="group__xhdmiphy1.html#gga507763f75897762cabf8819fde24ab8fa618c0fbfd33c119da0e2b28cf514972d">XHDMIPHY1_LOG_EVT_PPC_MSMTCH_ERR</a>, <a class="el" href="group__xhdmiphy1.html#gabda0c5df35f1e8c13b871c8edf38ff38">XHdmiphy1_LogWrite()</a>, and <a class="el" href="group__xhdmiphy1.html#ga0fa2836b8aac17e187bf1e01a462001a">XHdmiphy1_WriteCfgRefClkSelReg()</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>.</p>

</div>
</div>
<a class="anchor" id="gaed8eb9b3c3f96343f4358c9d54296af0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_SetIntrHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga0babc37b8b55084caeefe57eef4fbd62">XHdmiphy1_IntrHandlerType</a>&#160;</td>
          <td class="paramname"><em>HandlerType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga5ff00002844b75068ea21b03514fcf04">XHdmiphy1_IntrHandler</a>&#160;</td>
          <td class="paramname"><em>CallbackFunc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackRef</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function installs a callback function for the specified handler type. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance. </td></tr>
    <tr><td class="paramname">HandlerType</td><td>is the interrupt handler type which specifies which interrupt event to attach the callback for. </td></tr>
    <tr><td class="paramname">CallbackFunc</td><td>is the address to the callback function. </td></tr>
    <tr><td class="paramname">CallbackRef</td><td>is the user data item that will be passed to the callback function when it is invoked.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a1209c27b73680d5f924509cb1717ba11">XHdmiphy1::IntrCpllLockCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a299ed2990b28d0561a635f11b647cbd8">XHdmiphy1::IntrCpllLockHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#ae2ebcf179c7a4c5122606264c1313254">XHdmiphy1::IntrQpll1LockCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#af643b54434ad0e79c7059c26f77a29e7">XHdmiphy1::IntrQpll1LockHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#a3eb39abdf0e0de2bc7b2780116dad1fc">XHdmiphy1::IntrQpllLockCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#aba5d02fffa55f5c2ae38f24f3e48655d">XHdmiphy1::IntrQpllLockHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#ade70699e9fbb982482a8038c06f2b151">XHdmiphy1::IntrRxClkDetFreqChangeCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#aed8c859489a13cf7b883b4ed6d121420">XHdmiphy1::IntrRxClkDetFreqChangeHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#a236a6934b0578e57f77cc55e90e70326">XHdmiphy1::IntrRxMmcmLockCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#aba4ae1632f45de25ef1f548ecceb7a16">XHdmiphy1::IntrRxMmcmLockHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#ab108631f101eacc52db3574aca37ff1d">XHdmiphy1::IntrRxResetDoneCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#afbd86b5dc2ea02eca5f779558c23faaf">XHdmiphy1::IntrRxResetDoneHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#aa84057e2d584f28c2a571976f936296a">XHdmiphy1::IntrRxTmrTimeoutCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#acdae64b5744677ee58564afda2116bda">XHdmiphy1::IntrRxTmrTimeoutHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#acb9f1f5c38f678dfe435d1872d93c409">XHdmiphy1::IntrTxAlignDoneCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a9f4e3631341fe886a566a1c615109296">XHdmiphy1::IntrTxAlignDoneHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#ae5127143c4688998c92ed8eafb2ba7b2">XHdmiphy1::IntrTxClkDetFreqChangeCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a9e829bc4a1ba14c7973ee6d805a95de6">XHdmiphy1::IntrTxClkDetFreqChangeHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#a843def0eed56f4054c7f361715558b7c">XHdmiphy1::IntrTxMmcmLockCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a87976bb014b2a6f2e84e47ca3ded5cb3">XHdmiphy1::IntrTxMmcmLockHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#a6ecd9f63b374c8c8def7c8894f6340ec">XHdmiphy1::IntrTxResetDoneCallbackRef</a>, <a class="el" href="struct_x_hdmiphy1.html#a4f9c49683a90aa9841be70039e7dea31">XHdmiphy1::IntrTxResetDoneHandler</a>, <a class="el" href="struct_x_hdmiphy1.html#a2ea3d02859ef83099982ca7a91a16ca7">XHdmiphy1::IntrTxTmrTimeoutCallbackRef</a>, and <a class="el" href="struct_x_hdmiphy1.html#a65c3d295faeab03e349abbdce936ebad">XHdmiphy1::IntrTxTmrTimeoutHandler</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga1f26c79a098ddb33f610f5a88efc140e">XHdmiphy1_HdmiIntrHandlerCallbackInit()</a>.</p>

</div>
</div>
<a class="anchor" id="ga7efb70724bc3a6fa0d3bd6c9d7d22de4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_SetLogCallback </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64 *&#160;</td>
          <td class="paramname"><em>CallbackFunc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackRef</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function installs an asynchronous callback function for the LogWrite API: </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance. </td></tr>
    <tr><td class="paramname">CallbackFunc</td><td>is the address of the callback function. </td></tr>
    <tr><td class="paramname">CallbackRef</td><td>is a user data item that will be passed to the callback function when it is invoked.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#ae496b497afcb2b9faa866238d7cc2f11">XHdmiphy1::LogWriteCallback</a>, and <a class="el" href="struct_x_hdmiphy1.html#ad0bd5b3366de6fd019ba397cabdc37f2">XHdmiphy1::LogWriteRef</a>.</p>

</div>
</div>
<a class="anchor" id="ga615fe597062a12b286153f2ee8007e91"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_SetPolarity </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Polarity</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will set/clear the TX/RX polarity bit. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID which to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Polarity</td><td>0-Not inverted 1-Inverted</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga041ec28c400f1b4cb662d9670e0feff3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_SetPrbsSel </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga3532b332baefc7e9454c8d485aedb4c9">XHdmiphy1_PrbsPattern</a>&#160;</td>
          <td class="paramname"><em>Pattern</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will set the TX/RXPRBSEL of the GT. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID which to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Pattern</td><td>is the pattern XHdmiphy1_PrbsPattern</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="xhdmiphy1__hdmi_8c.html#a70ecb3c5614ea8c97c0bc56bd395ac2c">XHdmiphy1_Ch2Ids()</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga704b9c7161c4ac92beaa07113caaa36c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_SetRxLpm </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XHdmiphy1_DirectionType&#160;</td>
          <td class="paramname"><em>Dir</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will enable or disable the LPM logic in the Video PHY core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">Enable</td><td>will enable (if 1) or disable (if 0) the LPM logic.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="ga755a209f0abe848a3508017f83ad4c62"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_SetTxPostCursor </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Pc</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will set the TX post-curosr value for a given channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">Pe</td><td>is the pre-emphasis value to write.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gad9dd0d271c9be7416e55adc535257cea"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_SetTxPreEmphasis </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Pe</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will set the TX pre-emphasis value for a given channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">Pe</td><td>is the pre-emphasis value to write.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gaa01b2c0214336ba205fcac3c8fd7675d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_SetTxVoltageSwing </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Vs</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will set the TX voltage swing value for a given channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID to operate on. </td></tr>
    <tr><td class="paramname">Vs</td><td>is the voltage swing value to write.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#gaa15dd35a9b1670aab091738d3ecca9df">XHdmiphy1_Hdmi_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gae474ac8f1f2997229ec25e7584a4b827"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_TxPrbsForceError </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__xhdmiphy1.html#ga54f72201d2012e3c638ec92b5e310f23">XHdmiphy1_ChannelId</a>&#160;</td>
          <td class="paramname"><em>ChId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>ForceErr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function will set the TX/RXPRBSEL of the GT. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on. </td></tr>
    <tr><td class="paramname">ChId</td><td>is the channel ID which to operate on. </td></tr>
    <tr><td class="paramname">Dir</td><td>is an indicator for TX or RX. </td></tr>
    <tr><td class="paramname">ForceErr</td><td>0-No Error 1-Force Error</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="group__xhdmiphy1.html#ga962d997981e2e284c3c9dd0e8a9a5752">XHdmiphy1_ReadReg</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="gabe478d42590c0365f3e2feb3933321ec"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XHdmiphy1_WaitUs </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>MicroSeconds</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function is the delay/sleep function for the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> driver. </p>
<p>For the Zynq family, there exists native sleep functionality. For MicroBlaze however, there does not exist such functionality. In the MicroBlaze case, the default method for delaying is to use a predetermined amount of loop iterations. This method is prone to inaccuracy and dependent on system configuration; for greater accuracy, the user may supply their own delay/sleep handler, pointed to by InstancePtr-&gt;UserTimerWaitUs, which may have better accuracy if a hardware timer is used.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> instance. </td></tr>
    <tr><td class="paramname">MicroSeconds</td><td>is the number of microseconds to delay/sleep for.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1.html#a2410c544d217821ce4e85e391b1c676a">XHdmiphy1::IsReady</a>, and <a class="el" href="struct_x_hdmiphy1.html#af1e1e9687cea9cf0c57b24e69891d2bb">XHdmiphy1::UserTimerWaitUs</a>.</p>

</div>
</div>
<a class="anchor" id="ga0fa2836b8aac17e187bf1e01a462001a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XHdmiphy1_WriteCfgRefClkSelReg </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_hdmiphy1.html">XHdmiphy1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>QuadId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function writes the current software configuration for the reference clock selections to hardware for the specified quad on all channels. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_hdmiphy1.html" title="The XHdmiphy1 driver instance data. ">XHdmiphy1</a> core instance. </td></tr>
    <tr><td class="paramname">QuadId</td><td>is the GT quad ID to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_hdmiphy1___config.html#a2bbcc590627355bad185ca417e839a6e">XHdmiphy1_Config::BaseAddr</a>, <a class="el" href="struct_x_hdmiphy1.html#ae19e95b6e84e21a988ba6910ceb3f35a">XHdmiphy1::Config</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a4f48b4acc5459494a985eb01d5ab6a62">XHdmiphy1_Channel::CpllRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1.html#a0204ec609474b091ff494d61ebd2aa80">XHdmiphy1::Quads</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a0f72133d80e15fefd3c0a396370d263e">XHdmiphy1_Channel::RxDataRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#a7a285af4772a54f4c3f691dd1b7af66c">XHdmiphy1_Channel::RxOutRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#ab47437f00b7226d61098050f2e222f2e">XHdmiphy1_Channel::TxDataRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___channel.html#afa0b12ee18fbb74ca031341a33f79bbb">XHdmiphy1_Channel::TxOutRefClkSel</a>, <a class="el" href="struct_x_hdmiphy1___config.html#ad890da2c40e7f26bdc43fcb09473a327">XHdmiphy1_Config::XcvrType</a>, and <a class="el" href="group__xhdmiphy1.html#ga9e65226a4b7cf835cf8555e84d895555">XHdmiphy1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga1e17b8f3099b9edb96bdf732671b7efc">XHdmiphy1_Hdmi20Config()</a>, <a class="el" href="group__xhdmiphy1.html#ga2aa401218d0bc4c64c2210f85ccee457">XHdmiphy1_Hdmi21Config()</a>, <a class="el" href="group__xhdmiphy1.html#ga5a0a82f90d7a0f1c4c8180cfb465de0a">XHdmiphy1_HdmiRxTimerTimeoutHandler()</a>, <a class="el" href="group__xhdmiphy1.html#gada0844e8a6a828bb7d512259aca11498">XHdmiphy1_HdmiTxTimerTimeoutHandler()</a>, <a class="el" href="group__xhdmiphy1.html#ga82f13f4133bdf9ab03d845c8462dc091">XHdmiphy1_PllInitialize()</a>, <a class="el" href="group__xhdmiphy1.html#ga2bf27809a22eecc5194a8bad16261280">XHdmiphy1_SetHdmiRxParam()</a>, and <a class="el" href="group__xhdmiphy1.html#ga69e679f0c4444350910817be69cde77c">XHdmiphy1_SetHdmiTxParam()</a>.</p>

</div>
</div>
</div><!-- contents -->
</div><!-- doc-content -->
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
	<p class="footer">&copy; Copyright 2015-2022 Xilinx, Inc. All Rights Reserved.</p>
	<p class="footer">&copy; Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.</p>
</div>
</body>
</html>
